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CEP: Correlated Error Propagation for Hierarchical Soft Error Analysis
Journal of Electronic Testing, 2013Due to the continuous technology scaling, soft error becomes a major reliability issue at nanoscale technologies. Single or multiple event transients at low levels can result in multiple correlated bit flips at logic or higher abstraction levels. Addressing this correlation is essential for accurate low-level soft error rate estimation, and more ...
Chen, L., Ebrahimi, M., Tahoori, M. B.
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12th IEEE International On-Line Testing Symposium (IOLTS'06), 2006
Summary form only given. The quality of electrical tests during irradiation of components has also improved a lot. Test patterns have been modified and characteristics of recent DRAMs have had to be taken into account. We can also observe a trend in the results of soft error tests.
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Summary form only given. The quality of electrical tests during irradiation of components has also improved a lot. Test patterns have been modified and characteristics of recent DRAMs have had to be taken into account. We can also observe a trend in the results of soft error tests.
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2020
Embedded systems reliability is a wide subject and complex subject. For this reason, chapter two explores the main reliability challenges in electronic-based systems: Process Variability, Permanent faults, and Transient faults. Moreover, this chapter provides a brief introduction to Radiation-Induced Soft Errors.
Felipe Rocha da Rosa +2 more
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Embedded systems reliability is a wide subject and complex subject. For this reason, chapter two explores the main reliability challenges in electronic-based systems: Process Variability, Permanent faults, and Transient faults. Moreover, this chapter provides a brief introduction to Radiation-Induced Soft Errors.
Felipe Rocha da Rosa +2 more
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A dynamic approach to tolerate soft errors
Cluster Computing, 2012Dynamic implementation for software-based soft error tolerance method which can protect more types of codes can cover more soft errors. This paper explores soft error tolerance with dynamic software-based method. We propose a new dynamic software-based approach to tolerate soft errors.
Lei Xiong, Qingping Tan
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The concern for soft errors is not overblown
IEEE International Conference on Test, 2005., 2006Single event upsets in logic paths are an emerging concern for computing systems built in advanced CMOS technologies. Upset rates for latches used in sequential circuits are increasing, and combinatorial circuit elements will also become a factor for future technology nodes.
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Modeling the Propagation of Soft Errors in Programs
Proceedings of the 2nd International Conference on Computer Science and Software Engineering, 2019Due to the continuous growth of transistors in processors, the cloud computing paradigm and increasingly complex environment, soft errors, which are a category of typical transient errors, have become an urgent challenge in ground-level systems. To handle these errors, making clear the error propagation is the key step.
Lixing Xue, Zhan Zhang, Decheng Zou
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Enhancing I2C robustness to soft errors
2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), 2017This paper proposes the use of a I2C Bus Monitor core able to perform data integrity verification activities, to signalize metrics about the quality of communications, to detect transient faults and permanent errors on the bus and to act on the devices connected to the bus for the recovery of such errors avoiding failures.
Vicente Carvalho +1 more
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On Soft Error Immunity of Sequential Circuits
2010 19th IEEE Asian Test Symposium, 2010With technology scaling, radiation-induced soft error has been a major concern even for mainstream enterprise applications. Since various hardening solutions impose significant costs in performance, area and power consumption, full soft error protection can hardly satisfy the multiple design goals simultaneously.
Dan Zhu, Tun Li, Sikun Li
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2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
This paper presents a construction of a flip-flop (FF) that works as a soft error tolerant FF in system operations and as a BILBO (Built-In Logic Block Observer) FF in manufacturing testing. The construction of the proposed FF is based on that of an existing soft error tolerant FF, namely a BISER (Built-In Soft Error Resilience) FF.
Kazuteru Namba, Hideo Ito
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This paper presents a construction of a flip-flop (FF) that works as a soft error tolerant FF in system operations and as a BILBO (Built-In Logic Block Observer) FF in manufacturing testing. The construction of the proposed FF is based on that of an existing soft error tolerant FF, namely a BISER (Built-In Soft Error Resilience) FF.
Kazuteru Namba, Hideo Ito
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SIMD-based soft error detection
Proceedings of the ACM International Conference on Computing Frontiers, 2016Soft error rates in processors have been increasing with decreasing feature size and larger chips. Software-only solutions have been proposed to deal with this problem, for instance via instruction duplication. However, this leads to significant overheads in performance and energy.
Zhi Chen 0001 +2 more
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