Results 31 to 40 of about 279 (112)

Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

Advanced Electronic Materials, EarlyView.
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley   +1 more source

Neuromorphic Denoising with Fully Analog Memristive In‐Memory Computing

Advanced Intelligent Systems, EarlyView.
This article borrows the concepts of episodic memory in human brains to experimentally implement a memristor‐based neuromorphic denoising process. A homogeneous memristor processing unit is experimentally demonstrated for both temporal storage and neural network computation, imitating the synapses in the human brain.
Daijing Shi, Teng Zhang, Yuqi Li, Yaoyu Tao, Bonan Yan, Yuchao Yang   +5 more
wiley   +1 more source

Review of Memristors for In‐Memory Computing and Spiking Neural Networks

Advanced Intelligent Systems, Volume 8, Issue 3, March 2026.
Memristors uniquely enable energy‐efficient, brain‐inspired computing by acting as both memory and synaptic elements. This review highlights their physical mechanisms, integration in crossbar arrays, and role in spiking neural networks. Key challenges, including variability, relaxation, and stochastic switching, are discussed, alongside emerging ...
Mostafa Shooshtari, Teresa Serrano‐Gotarredona, Bernabé Linares‐Barranco   +2 more
wiley   +1 more source

On the Use of Magnetic RAMs in Field-Programmable Gate Arrays

International Journal of Reconfigurable Computing, 2008
This paper describes the integration of field-induced magnetic switching (FIMS) and thermally assisted switching (TAS) magnetic random access memories in FPGA design.
Y. Guillemenet, L. Torres, G. Sassatelli, N. Bruchon   +3 more
doaj   +1 more source

Cryogenic Neuromorphic Synaptic Behavior in 180 nm Silicon Transistors for Emerging Computing Systems

Advanced Intelligent Systems, Volume 8, Issue 2, February 2026.
This study investigates the neuromorphic plasticity behavior of 180 nm bulk complementary metal oxide semiconductor (CMOS) transistors at cryogenic temperatures. The observed hysteresis data reveal a signature of synaptic behavior in CMOS transistors at 4 K.
Fiheon Imroze, Bhavani Yalagala, Naveen Kumar, Mostafa Elsayed, Meraj Ahmad, Robert Graham, Vihar Georgiev, Hadi Heidari, Martin Weides   +8 more
wiley   +1 more source

FPGA Realization of a Novel Hyperchaos Augmented Image Encryption Algorithm

IET Computers &Digital Techniques, Volume 2026, Issue 1, 2026.
With the rapid growth of multimedia communication, protecting image data has become increasingly critical. This article proposes a novel 3‐stage hyperchaos‐based augmented image encryption technique (3SHAIET) that utilizes a three‐stage process with chaotic systems of increasing dimensionality (e.g., six‐dimensional [6D], 8D, and 9D) to enhance ...
Wassim Alexan, Noura H. Elshabasy, Eyad Mamdouh, Remas Osama, Mohamed A. Abd El Ghany, Dina El-Damak, Jim Harkin   +6 more
wiley   +1 more source

FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework

Sensors, 2018
Cyber-Physical Systems are experiencing a paradigm shift in which processing has been relocated to the distributed sensing layer and is no longer performed in a centralized manner.
Alfonso Rodríguez, Juan Valverde, Jorge Portilla, Andrés Otero, Teresa Riesgo, Eduardo de la Torre   +5 more
doaj   +1 more source

UASR‐A: An Efficient Edge Super‐Resolution Accelerator With Hardware‐Algorithm Co‐Design Techniques

Electronics Letters, Volume 62, Issue 1, January/December 2026.
Deploying high‐performance super‐resolution on resource‐constrained edge devices is difficult due to heavy computation and memory bandwidth limits. We propose a hardware software co‐design consisting of a lightweight unified‐attention super‐resolution network (UASR) network (ConvFormer with unified‐attention mixer [UA‐M] and reparameterized edge ...
Yuqiao Huang, Dihu Chen, Tao Su
wiley   +1 more source

A High Performance Digital Time Interval Spectrometer: An Embedded, FPGA-Based System With Reduced Dead Time Behaviour

Metrology and Measurement Systems, 2015
In this work, a fast 32-bit one-million-channel time interval spectrometer is proposed based on field programmable gate arrays (FPGAs). The time resolution is adjustable down to 3.33 ns (= T, the digitization/discretization period) based on a prototype ...
Arkani Mohammad
doaj   +1 more source

Virtual Page‐Based Flash Translation Layer for Compressed Solid‐State Drives

Electronics Letters, Volume 62, Issue 1, January/December 2026.
This letter introduces a virtual page‐based flash translation layer (VPFTL) addressing the asymmetric logical‐to‐physical mappings introduced by data compression in SSDs. By grouping multiple physically related pages into a single virtual page, VPFTL flexibly manages mappings while preserving performance.
Yifan Shen, Jianjun Luo, Boming Huang, Wenyi Yang, Wenhao Yang, Hangxiang Chen   +5 more
wiley   +1 more source