Efficient microcontroller system to test an SRAM chip using signature analysis
2017 13th International Computer Engineering Conference (ICENCO), 2017Memory in recent technology is considered an important element in the electronic system. It is required to test the memory for high fault coverage and less test application time. In this paper, the low-cost design of the microcomputer-based testing (MBT) for the static random access memory (SRAM) is presented using signature analysis.
Mahmoud S. Ragab +2 more
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Low-Power Technique for SRAM-Based On-Chip Arbitrary-Waveform Generator
IEEE Transactions on Instrumentation and Measurement, 2011A low-power technique for a static random-access memory (SRAM)-based on-chip arbitrary-waveform generator (AWG) is proposed for two types of analog-signal-processing applications: multiresolution spectrum sensing and matched filter. The SRAM has an embedded address generator to limit the operation in a sequential-access mode of the AWG. Then, the power
Song, Taejoong +9 more
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An SRAM Test Quality Improvement Method For Automotive chips
2021 IEEE International Test Conference in Asia (ITC-Asia), 2021Tuanhui Xu +3 more
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On-Chip SRAM Disclosure Attack Prevention Technique for SoC
2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS), 2023Prokash Ghosh +2 more
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A survey of SRAM-based in-memory computing techniques and applications
Journal of Systems Architecture, 2021Sparsh Mittal +2 more
exaly
Design of high stability, low power and high speed 12 T SRAM cell in 32-nm CNTFET technology
AEU - International Journal of Electronics and Communications, 2022Erfan Abbasian
exaly
Error reduction of SRAM-based physically unclonable function for chip authentication
International Journal of Information Security, 2023Moon-Seok Kim +6 more
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XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks
IEEE Journal of Solid-State Circuits, 2020Shihui Yin, Zhewei Jiang, Jae-Sun Seo
exaly
C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism
IEEE Journal of Solid-State Circuits, 2020Zhewei Jiang, Shihui Yin, Jae-Sun Seo
exaly
A Comprehensive Study of Nanosheet and Forksheet SRAM for Beyond N5 Node
IEEE Transactions on Electron Devices, 2021Mohit Gupta, Doyoung Jang, Bilal Chehab
exaly

