Results 101 to 110 of about 129,221 (220)
STT-RAM-Based Domain-Specific Architectures for Resource-Constrained Systems
, 2023 Resource-constrained consumer devices such as embedded systems, wearables, smartphones, etc., have become some of the fastest-growing products. Unlike general-purpose systems, resource-constrained devices are expected to perform various tasks within ...
GAJARIA, DHRUV MAYUR
core
Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache
, 2016 Xunchao Chen +6 more
openalex +2 more sources
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design [PDF]
, 2019 Kyle Kuan, Tosiron Adegbija
openalex +1 more source
Exploiting Memory Resilience for Emerging Technologies: An Energy-Aware Resilience Exemplar for STT-RAM Memories [PDF]
, 2020 Amir Mahdi Hosseini Monazzah +3 more
openalex +1 more source
A compact model of stochastic switching in STT magnetic RAM for memory and computing
, 2019 Spin-transfer torque random access memory (STT-RAM) is gaining momentum as a promising technology for high density and embedded nonvolatile memory. To enable the design of STT-RAM circuits for memory and computing, there is a need for accurate compact ...
Ielmini D. +6 more
core +1 more source
UEG Week 2025 Moderated Posters
United European Gastroenterology Journal, Volume 13, Issue S8, Page S189-S802, October 2025.
wiley +1 more source
7A-5 A Coherent Hybrid SRAM and STT-RAM L1 Cache Architecture for Shared Memory Multicores
, 2014 — STT-RAM is an emerging NVRAM technology that promises high density, low energy and a comparable access speed to conventional SRAM. This paper proposes a hybrid L1 cache architecture that incorporates both SRAM and STT-RAM.
Jianxing Wang +6 more
core +1 more source
DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors
, 2019 Spin-transfer torque RAMs (STT-RAMs) have been studied as a promising alternative to SRAMs in emerging caches and main memories due to their low leakage power and high density. However, STT-RAMs, also have drawbacks of high dynamic write energy and long
Gajaria, Dhruv Mayur
core
Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar Arrays
, 2019 In this paper, we propose a Spin Transfer Torque RAM (STT-RAM) based neurosynaptic core to implement a hardware accelerator for Spiking Neural Networks (SNNs), which mimic the time-based signal encoding and processing mechanisms of the human brain.
Jae-Sun Seo +9 more
core +1 more source