Threshold-Voltage Modulation and N<sub>2</sub>O Plasma Passivation for Enhanced Retention and Memory Window in Capacitorless 2T0C DRAM Oxide Thin-Film Transistors. [PDF]
Adv Sci (Weinh)Yang C, Lee M, Han J, Nam S.
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A Stepped-Spacer FinFET Design for Enhanced Device Performance in FPGA Applications. [PDF]
Micromachines (Basel)Zareiee M, Mehrad M, Tawfik A.
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3-Levels Vertically Stacked Si Nanosheet GAA pFETs with Low-Temperature Interface Treatment for Cryogenic Application. [PDF]
Nanomaterials (Basel)Qian L +6 more
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TCAD Simulation of STI Depth and SiO<sub>2</sub>/Silicon Interface Trap Modulation Effects on Low-Frequency Noise in HZO-Based Nanosheet FETs. [PDF]
Nanomaterials (Basel)Lee W, Lee J.
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Characterization and understanding of subthreshold swing of Si MOSFETs at cryogenic temperatures
, 2023 openaire +1 more source
Buried-Gate Flexible CNT FET with HZO Dielectric on Mica Substrate. [PDF]
Nanomaterials (Basel)Li H +5 more
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<i>Ab initio</i> quantum transport investigation of Sub-3 nm β-InSe transistors for future high-performance nanoelectronics. [PDF]
RSC AdvGhafoor M +7 more
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Design and analysis of NC-FinFET using Pb(Zr<sub>y</sub>Ti<sub>1-y</sub>)O<sub>3</sub> under high ionising radiations. [PDF]
Sci RepTripathi SL +4 more
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Demonstration of TFTs 3D monolithically integrated on GaN HEMTs using cascode configuration with high breakdown voltage (> 1900 V). [PDF]
Sci RepWu TL +5 more
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Study of Dielectric-Modulated Buried Source Horizontally Double-Gate TFET-Based Biosensors. [PDF]
ACS OmegaYang J +7 more
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