Results 161 to 170 of about 14,821 (206)

Low power successive approximation ADC for biomedical applications

2014 International Symposium on Next-Generation Electronics (ISNE), 2014
In this paper, we discuss the low power design of a 1-volt 12-bit analog to digital converter (ADC) for biomedical signal applications. We use both the fixed reference voltage, and the complementary signal generator for the design of the mixed charge serial DAC. It is effective to improve the DAC characteristics. The obtained DNL is +0.08LSB ~ −0.08LSB
Hsin Huang, Chia-Nan Wey, Hwang-Cherng Chow   +2 more
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A successive-approximation ADC for CMOS image sensors

2011 International Conference on Multimedia Computing and Systems, 2011
The CMOS image sensors are achieving a growing presence in today's mobile applications as the industry acknowledges the advances of the CMOS-based technology and its scaling possibilities. The roadmap recently unveiled for CMOS Image Sensor is announcing ever smaller pixels, after 1.4μm pixel pitch, demos with a pitch of 1.1μm were presented, and it ...
Malika Alami Marktani, Stephane Vivien, Laurent Simony, Ali Ahaitouf, Abdelaziz Ahaitouf   +4 more
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Fault and diagnosis on a successive approximation ADC

IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings, 1999
In successive approximation A/D converters, the origin of failure is located through the bit error which is computed from the histogram, if it fulfil some conditions. In this paper, we present the real case of a failing A/D converter whose bit error is not computable.
Francois Marc, Dominique Dallet, Yves Danto   +2 more
openaire   +1 more source

Successive approximation register ADC single event effects protection and evaluation

Journal of Instrumentation, 2022
Abstract This work analyses seven different alternatives to implement an ADC based on the successive approximation register (SAR) architecture. The influence of the encoding is taken into account while evaluating the importance of its reset approach. Different protection strategies against single event upsets are addressed, including the
B. Sanches, M. Bregant, H. Hernandez, W. van Noije   +3 more
openaire   +1 more source

An ultra low-energy DAC for successive approximation ADCs

Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010
An ultra low-energy successive approximation (SA) Analog-to-Digital Converter (ADC) is presented. The proposed ADC uses an energy-efficient unit capacitor array having a new switching arrangement in DAC for passive charge re-distribution. Reference levels are generated sequentially to get successive bits.
Hande Vinayak Gopal, Maryam Shojaei Baghini   +1 more
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A successive approximation ADC with resistor-capacitor hybrid structure

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT), 2013
This paper presents a 10-bit 50MS/s successive approximation register (SAR) ADC with low input capacitance that uses an on-chip resistive ladder to arrange a new switching scheme. The proposed arrangement not only reduces the total input capacitance, but also performs the predictive capacitor switching sequence to further reduce the power consumption ...
null Ting-Zi Chen, null Soon-Jyh Chang, null Guan-Ying Huang   +2 more
openaire   +1 more source

Implementation of low power Successive Approximation ADC for MAV's

2013 International Conference on Signal Processing , Image Processing & Pattern Recognition, 2013
In communication subsystems such as Micro air vehicles MAV's, it becomes mandatory to design the circuits with low power and low voltage to enhance the system by means of long sustainability and less power consumption with maintenance free operation, especially in the circuits like Analog to Digital Converters (ADCs).
A. Aditya, G. Rakesh Chowdary, J. Meenakshi, T. Praveen Blessington, M. S. Vamsi Krishna   +4 more
openaire   +1 more source

A 72dB-SNDR rail-to-rail successive approximation ADC

2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, 2012
When the voltage of analog input signal equals to supply voltage, the general successive approximation ADC is difficult to convert it into digital signal correctly. So this paper introduces a new successive approximation ADC which can convert rail-to-rail input range and reduce sampling time through a track-and-hold circuit.
Liu Yan, Xue Zhiyuan, Li Quanquan, Hua Siliang, Wang Donghui   +4 more
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A low energy two-step successive approximation algorithm for ADC design

2009 IEEE International Symposium on Circuits and Systems, 2008
This paper presents a new method for switching the capacitors in the DAC capacitor array of a successive approximation register (SAR) ADC. By separating the decoding of the most significant bits and the least significant bits, and using two different capacitor arrays with unequal size to determine their values, respectively, the average switching ...
Ricky Yiu-kee Choi, Chi-ying Tsui
openaire   +1 more source

ADCs Based on Successive Approximation

2015
Chapter 1 discusses the various performance parameters and architectures of ADCs. The SAR ADC is presented as the ADC that is most frequently used in industrial applications, because it provides a high resolution (12–18 bit) at a medium sample rate (around 1 MSPS).
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