Results 51 to 60 of about 14,821 (206)

Model and Design of a Power Driver for Piezoelectric Stack Actuators [PDF]

, 2010
A power driver has been developed to control piezoelectric stack actuators used in automotive application. A FEM model of the actuator has been implemented starting from experimental characterization of the stack and mechanical and piezoelectric ...
Botto, Gianluca, Chiaberge, Marcello, De Giuseppe, M., Tonoli, Andrea   +3 more
core   +1 more source

A Design of 44.1 fJ/Conv-Step 12-Bit 80 ms/s Time Interleaved Hybrid Type SAR ADC With Redundancy Capacitor and On-Chip Time-Skew Calibration

IEEE Access, 2021
A 12-bit 80 MS/s hybrid type analog-to-digital converter (ADC) for high sampling speed and low power applications is presented in this paper. It has a subranging architecture with a front end of 6-bit Flash ADC with five channels of 6-bit time ...
Deeksha Verma, Behnam S. Rikan, Khuram Shehzad, Sung Jin Kim, Danial Khan, Venkatesh Kommangunta, Syed Adil Ali Shah, Younggun Pu, Sang-Sun Yoo, Keum Cheol Hwang, Youngoo Yang, Kang-Yoon Lee   +11 more
doaj   +1 more source

A low-power Successive Approximation ADC for biomedical applications

IEICE Electronics Express, 2011
A new switching algorithm is proposed in Successive Approximation Analog-to-Digital Converters (SA-ADCs) to reduce the power consumption in both DAC and comparator. This technique is more efficient in applications where the input signal has low-varying characteristics.
Mehdi Saberi, Hassan Sepehrian, Reza Lotfi, Khalil Mafinezhad   +3 more
openaire   +2 more sources

Investigasi terhadap Kemampuan 2 Tipe ADC [PDF]

, 2009
Telah dibuat simulasi dan rangkaian untuk ADC (Analog to Digital Converter) tipe Flash dan SAR (Successive Approximation Register) 3 Bit. Simulasi dijalankan dengan memakai program Multisim dan Livewire.
Adnan, Y. (Yulinar), Assa’idah, A. (Assa’idah)   +1 more
core  

8.4‐to‐16‐bit resolution, 1‐to‐16 kHz bandwidth ADC with programmable‐gain functionality for multi‐sensor applications

Electronics Letters, 2019
A resolution‐reconfigurable, bandwidth‐scalable analogue‐to‐digital converter (ADC) with programmable‐gain (PG) functionality for a multi‐sensor system, which encompasses various signals such as bio‐signals and battery‐level, is presented.
J. Rhee, S. Kim
doaj   +1 more source

Методи побудови АЦП порозрядного наближення, що самокалібруються [PDF]

, 2008
У статті розглядаються стратегії самокалібрування похибок характеристики перетворення АЦП послідовного наближення. Приводиться алгоритм калібрування АЦП із ваговою надлишковістю з осередненням на розгортках.
Азаров, О. Д., Кадук, О. В.   +1 more
core  

Design and Implementation of High Speed and Low Power 12-Bit SAR ADC Using 22nm FinFET

Iranian Journal of Electrical and Electronic Engineering, 2022
Successive approximation register (SAR) analog to digital converter (ADC) architecture comprises submodules such as comparator, digital to analog converters (DAC), and SAR logic.
G. Vasudeva, B. V. Uma
doaj  

Reliability analysis of buffer stage in mixed signal application [PDF]

Advances in Radio Science, 2011
This paper discusses reliability analysis of a buffer circuit targeted for an analog to digital converter application. The circuit designed in a 32 nm high-κ metal gate CMOS technology was investigated by circuit simulation and sensitivity analysis. This
S. More, M. Fulde, F. Chouard, D. Schmitt-Landsiedel   +3 more
doaj   +1 more source

An 18.39 fJ/Conversion-Step 1-MS/s 12-bit SAR ADC With Non-Binary Multiple-LSB-Redundant and Non-Integer-and-Split-Capacitor DAC

IEEE Access, 2021
A low-power 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) with split-capacitor, nonbinary-weighted, and multiple-least-significant-bit (LSB)-redundant capacitor digital-to-analog converters (CDACs) is proposed.
Hsuan-Lun Kuo, Chih-Wen Lu, Poki Chen
doaj   +1 more source

Operation of a LAr-TPC equipped with a multilayer LEM charge readout [PDF]

, 2017
A novel detector for the ionization signal in a single phase LAr-TPC, based on the adoption of a multilayer Large Electron Multiplier (LEM) replacing the traditional anodic wire arrays, has been experimented in the ICARINO test facility at the INFN ...
Baibussinov, B., Centro, S., Farnese, C., Fava, A., Gibin, D., Guglielmi, A., Meng, G., Pietropaolo, F., Varanini, F., Ventura, S., Zatrimaylov, K.   +10 more
core   +3 more sources