Results 71 to 80 of about 14,821 (206)

Towards a single-photon energy-sensitive pixel readout chip: pixel level ADCs and digital readout circuitry [PDF]

, 2002
Unlike conventional CMOS imaging, a single\ud photon imager detects each individual photon impinging on\ud a detector, accumulating the number of photons during a\ud certain time window and not the charge generated by the all\ud the photons hitting the ...
Nauta, B., San Segundo Bello, D., Visschers, J.A.   +2 more
core   +1 more source

A Triple-Mode Performance-Optimized Reconfigurable Incremental ADC for Smart Sensor Applications [PDF]

, 2019
This paper proposes a triple-mode discrete-time incremental analog-to-digital converter (IADC) employing successive approximation register (SAR)-based zooming and extended counting (EC) schemes to achieve programmable trade-off capability of resolution ...
Kim, Jae Joon, Oh, Byungjoo, Park, Kyeonghwan   +2 more
core   +1 more source

Capacitor-Chain Successive-Approximation ADC [PDF]

A proposed successive-approximation analog-to-digital converter (ADC) would contain a capacitively terminated chain of identical capacitor cells. Like a conventional successive-approximation ADC containing a bank of binary-scaled capacitors, the proposed
Cunningham, Thomas
core   +1 more source

Precise 3D track reconstruction algorithm for the ICARUS T600 liquid argon time projection chamber detector [PDF]

, 2012
Liquid Argon Time Projection Chamber (LAr TPC) detectors offer charged particle imaging capability with remarkable spatial resolution. Precise event reconstruction procedures are critical in order to fully exploit the potential of this technology.
Antonello, M., Baibussinov, B., Benetti, P., Calligarich, E., Canci, N., Centro, S., Cesana, A., Cieslik, K., Cline, D. B., Cocco, A. G., Dabrowska, A., Dequal, D., Dermenev, A., Dolfini, R., Farnese, C., Fava, A., Ferrari, A., Fiorillo, G., Gibin, D., Gninenko, S., Guglielmi, A., Haranczyk, M., Holeczek, J., Ivashkin, A., Kisiel, J., Kochanek, I., Lagoda, J., Mania, S., Menegolli, A., Meng, G., Montanari, C., Otwinowski, S., Piazzoli, A., Picchi, P., Pietropaolo, F., Plonski, P., Rappoldi, A., Raselli, G. L., Rossella, M., Rubbia, C., Sala, P., Scaramelli, A., Segreto, E., Sergiampietri, F., Stefan, D., Stepaniak, J., Sulej, R., Szarska, M., Terrani, M., Varanini, F., Ventura, S., Vignoli, C., Wang, H., Yang, X., Zalewska, A., Zaremba, K.   +55 more
core   +5 more sources

Background digital calibration of successive approximation ADC with adaptive equalisation

Electronics Letters, 2009
An equalisation-based digital background error-correction technique for successive approximation analogue-to-digital converters (SA-ADCs) is presented. This technique enables the size of the sampling capacitors to be scaled down to the kT/C limit without matching concerns.
W. Liu, Y. Chiu
openaire   +1 more source

A 20-bit SAR-Assisted Extended Counting Incremental ADC With a Clock-Controlled PGA Buffer

IEEE Access
To optimize small signal acquisition and conversion, analog-to-digital converter (ADC) often requires a programmable gain amplifier (PGA) and buffer.
Xueke Xu, Yunpeng Li, Zirui Cui, Qingqing Sun, Hao Zhu   +4 more
doaj   +1 more source

Background bit‐weight calibration in pipelined successive approximation register ADC

Electronics Letters, 2020
A background bit‐weight calibration in pipelined successive approximation register ADC is proposed. By exploiting the conversion results of the first stage to determine the injection of the dithered signal and introducing two extra capacitors into the first stage to reduce the range of first‐stage residue, a robust and totally background calibration is
openaire   +1 more source

Concrete materials : series 1 [PDF]

, 2017
This book provides the various usages of materials for producing good concrete. It will appeal to several major audiences. It is a compilation of works which using different types of material in concrete.

core  

Development of CMOS monolithic pixel sensors with in-pixel correlated double sampling and fast readout for the ILC

, 2007
This paper presents the design and results of detailed tests of a CMOS active pixel chip for charged particle detection with in-pixel charge storage for correlated double sampling and readout in rolling shutter mode at frequencies up to 25 MHz.
Battaglia, Marco, Bussat, Jean-Marie, Contarato, Devis, Denes, Peter, Giubilato, Piero, Glesener, Lindsay E.   +5 more
core   +1 more source

A Power-Efficient 16-bit 1-MS/s Successive Approximation Register Analog-to-Digital Converter with Digital Calibration in 0.18 μm Complementary Metal Oxide Semiconductor

Journal of Low Power Electronics and Applications
A power-efficient 16-bit 1-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is presented in this paper. High-bit sampling makes the bridge capacitance in the digital-to-analog converter (DAC) a unit one, eliminating ...
Xinyuan He, Weifeng Qiao, Xinpeng Xing, Haigang Feng   +3 more
doaj   +1 more source