Results 251 to 260 of about 1,417 (268)

Analysis and Investigation on Time Interleaved Successive Approximation Register Analog to Digital Converter (TI-SAR ADC)- Cutting Edge Progress

International Journal of Electrical Engineering and Computer Science
Signals are converted, processed and transmitted digitally exploiting the limitations of the sensory organs of humans, approximating their speech, image and videos but the real world is analog. Interfacing analog and digital systems is necessary to fully leverage the power of digital computation.
Aditya Pradeep Atre, Rupesh Chandrakant Jaiswal, Minakshi Pradeep Atre   +2 more
openaire   +1 more source

Two CMOS time to digital converters using successive approximation register logic

IEICE Electronics Express, 2018
Himchan Park, Qiwei Huang, Changzhi Yu   +2 more
exaly  

Shifting the sampled input signal in successive approximation register analog‐to‐digital converters to reduce the digital‐to‐analog converter switching energy and area

International Journal of Circuit Theory and Applications, 2020
, Mohammad Yavari
exaly  

Design and Optimization of a Low-Power Comparator for a 10-Bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for General-Purpose Applications

2024 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE)
Tejas M P, null Venkateshappa
openaire   +1 more source

Digital‐domain dual‐calibration for single‐ended successive approximation register ADCs

Electronics Letters, 2015
Jianhui Wu, Chao Chen
exaly  

An ultra-low power 10-bit 40 MS/s Successive-Approximation-Register (SAR) Analog-to-Digital Converter (ADC) for single photon SiPM detector in X-ray applications

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
Binjie Ge, Yan Li, Hang Yu, Shanshan Yong, Jinpeng Shen, Daoming Xi, Qingguo Xie   +6 more
openaire   +1 more source

A 10-bit 100 MS/s Successive Approximation Register Analog-To-Digital Converter Design

IEICE Transactions on Electronics, 2014
Jhin-Fang Huang, Wen-Cheng Lai
exaly  

The successive approximation register ADC: a versatile building block for ultra-low- power to ultra-high-speed applications

2016
Boris Murmann
exaly  

Design and Simulation of a High-Speed 16-Bit Successive Approximation Register ADC (SAR ADC) with Capacitive-DAC Implementation Using Verilog

M. Keerthana, K. Ragini, D. Anjali, M. Harshitha, S. Akshitha   +4 more
openaire   +1 more source

A 0.31–1 GHz Fast-Corrected Duty-Cycle Corrector With Successive Approximation Register for DDR DRAM Applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2012
Won Ho Choi, Chulwoo Kim, Soo-Won Kim
exaly