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The heterogeneous sensor system on chip

2012 IEEE Asia Pacific Conference on Circuits and Systems, 2012
Ultra-small sensing technology has become an important research field because of the growth of sensor network technology. To accomplish the small form factor and low power consumption, heterogeneous integration of sensing elements and circuits has attracted attentions from different aspects.
Chang-Hung Lee   +4 more
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Reliable communication in systems on chips

Proceedings of the 41st annual Design Automation Conference, 2004
System on Chip (SoC) design faces several challenges which are due to the extremely small nature of electronic devices and the consequent opportunity to realize multi-processing systems of extremely high complexity. To manage large scale design, SoCs are assembled out of complex standard parts, such as programmable cores and memory arrays.
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Configurable systems-on-chip (CSoC)

Proceedings. 15th Symposium on Integrated Circuits and Systems Design, 2003
Systems-on-chip (SoCs) has become reality now, driven by fast development of CMOS VLSI technologies. Complex system integration onto one single die introduces a set of various challenges and perspectives for industrial and academic institutions. Important issues to be addressed here are cost-effective technologies, efficient and application-tailored ...
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Multiprocessor system-on-chip technology

IEEE Signal Processing Magazine, 2009
Signal processing is a prime application for very large scale integration (VLSI) technology and systems-on-chips (SoCs), so it should be no surprise that a great deal of effort has been put into the design of architectures for signal processing. The need for programmability, real-time performance, and low-power operation are all driving factors in the ...
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Gamification of System-on-Chip design

2014 International Symposium on System-on-Chip (SoC), 2014
This paper presents drastic new concepts for SoC design tools. The motivation is ever increasing productivity gap that is caused by complexity of the design process with current methods. Plain code, schematic block diagrams and various graph-tree-table descriptions have been there for tens of years.
Timo D. Hämäläinen, Erno Salminen
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Retiming for wire pipelining in System-On-Chip

ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486), 2003
At the integration scale of system-on-chips (SOCs), the conflicts between communication and computation will become prominent even on a chip.
Chuan Lin 0002, Hai Zhou 0001
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System on Chip (SoC) Design

2019
This chapter deals with introduction to system on chip (SOC), constituents of SOC and few examples of SOCs, followed by SOC development cycle, design planning, design requirements, the design center infrastructure, design and verification intellectual properties IPs, and design flows of different constituents of SOC.
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System on Chip (SOC) Design

2016
SOCs are complex density ASICs and need to be validated using the FPGAs. In the present scenario there is more demand for the FPGA prototyping to realize the ASICs. Single or multiple FPGA can be used to prototype the desired SOC functionality. This chapter focuses on the discussion on the SOC components, challenges, and the SOC design flow.
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A Sensor System On Chip for Wireless Microsystems

2006 IEEE International Symposium on Circuits and Systems, 2006
Recent years have seen the rapid development of microsensor technology, system on chip design, wireless technology and ubiquitous computing. When assembled into a complex microsystem the technologies become powerful tools in medical diagnostics, environmental monitoring and personal connectivity. In this paper we describe the demonstration of a silicon
Lei Wang 0029   +12 more
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A system-on-chip for pressure-sensitive fabric

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169), 2002
This paper presents a mixed-signal system-on-chip (SOC) for decoding the pressure exerted over a large piece of smart fabric. The image map of the pressure applied over the fabric surface is achieved by detecting the capacitance variation between rows and columns of conductive fibers patterned on the two opposite sides of an elastic layer, like ...
Maximilian Sergio   +4 more
openaire   +1 more source

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