Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors [PDF]
Nature Communications, 2022 High-density information processing without increasing the circuit complexity is highly desired in electronics. Here, Im et al. demonstrate a low-voltage organic ternary logic circuit vertically integrated with the nonvolatile flash memory, increasing ...
Junhwan Choi +7 more
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Design and Application of Memristive Balanced Ternary Univariate Logic Circuit [PDF]
Micromachines, 2023 This paper proposes a unique memristor-based design scheme for a balanced ternary digital logic circuit. First, a design method of a single-variable logic function circuit is proposed.
Xiaoyuan Wang +4 more
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Ternary Logic Design Based on Novel Tunneling-Drift-Diffusion Field-Effect Transistors [PDF]
NanomaterialsIn this paper, a novel Tunneling-Drift-Diffusion Field-Effect Transistor (TDDFET) based on the combination of the quantum tunneling and conventional drift-diffusion mechanisms is proposed for the design of ternary logic circuits. The working principle of
Bin Lu +7 more
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Design of Ternary Logic and Arithmetic Circuits Using GNRFET [PDF]
IEEE Open Journal of Nanotechnology, 2020 Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
Zarin Tasnim Sandhie +2 more
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Demonstration of Anti-ambipolar Switch and Its Applications for Extremely Low Power Ternary Logic Circuits. [PDF]
ACS Nano, 2022 Anti-ambipolar switch (AAS) devices at a narrow bias region are necessary to solve the intrinsic leakage current problem of ternary logic circuits. In this study, an AAS device with a very high peak-to-valley ratio (∼106) and adjustable operating range ...
Lee Y +10 more
europepmc +2 more sources
High-performance ternary logic circuits and neural networks based on carbon nanotube source-gating transistors. [PDF]
Sci AdvMulti-valued logics (MVLs) offer higher information density, reduced circuit and interconnect complexity, lower power dissipation, and faster speed over conventional binary logic system.
Zhu X +11 more
europepmc +2 more sources
Comments on “High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits”
IEEE Access, 2020 In the above article [1], R. A. Jaber et al. present the designs of ternary logic circuits based on CNTFET technology. The motivation for designing ternary gates is based on the following assumption quoted in the abstract: “Moreover, multi-valued ...
Daniel Etiemble
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An Optimal Gate Design for the Synthesis of Ternary Logic Circuits [PDF]
Asia and South Pacific Design Automation Conference, 2018 Department of Electrical EngineeringOver the last few decades, CMOS-based digital circuits have been steadily developed. However, because of the power density limits, device scaling may soon come to an end, and new approaches for circuit designs are ...
KANG, SEOKHYEONG +2 more
core +2 more sources
An RTL-Based General Synthesis Methodology for Device-Independent Ternary Logic Circuits
IEEE AccessTernary logic circuits are considered a high-potential alternative that can continue the technological advance of binary logic. Current studies in ternary logic focus on two aspects: One focuses on designing specific ternary circuits (such as adders ...
Hanmok Park +3 more
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High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits
IEEE Access, 2019 Recently, the demand for portable electronics and embedded systems has increased. These devices need low-power circuit designs because they depend on batteries as an energy resource.
Ramzi A. Jaber +4 more
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