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TERNARY LOGIC CIRCUITS USING CNTFET: A BRIEF REVIEW

International Journal of Engineering Applied Sciences and Technology, 2020
A brief review about carbon nanotube is presented at first, followed by nnnnnna brief review of ternary logic and then finally some of the ternary logic circuit built with carbon nanotube field effect transistor (CNTFET) are discussed. Recent progress in
Pradeep Singh Yadav, Anurag Nair
openaire   +2 more sources

Binary and ternary logic-in-memory using nanosheet feedback field-effect transistors with triple-gated structure [PDF]

Scientific Reports
In this study, we demonstrate binary and ternary logic-in-memory (LIM) operations of inverters and NAND and NOR gates comprising nanosheet (NS) feedback field-effect transistors (FBFETs) with a triple-gated structure. The NS FBFETs are reconfigured in p-
Jongseong Han, Jaemin Son, Seungho Ryu, Kyoungah Cho, Sangsig Kim   +4 more
doaj   +2 more sources

Ternary Toward Binary: Circuit-Level Implementation of Ternary Logic Using Depletion-Mode and Conventional MOSFETs

IEEE Access
The application of artificial intelligence (AI) requires advanced computation to address complex problems. However, the improvement of binary computing systems supporting these applications is approaching their limits due to atomic-level scaling ...
Hyundong Lee, Seonghoon Kim, Jongbeom Kim, Jaehoon Jeong, Jeonggyu Yang, Taigon Song   +5 more
doaj   +2 more sources

Noise tolerant and power optimized ternary combinational circuits for arithmetic logic unit

e-Prime: Advances in Electrical Engineering, Electronics and Energy
This article proposed the use of an efficient ternary multiplexer as a building block in the implementation of ternary adders and multipliers. These designs aim to reduce the power consumption and minimize the transistor counts while maintaining low ...
Katyayani Chauhan, Deepika Bansal
doaj   +2 more sources

Performance analysis of Ternary Adder and Ternary Multiplier without using Encoders and Decoders [PDF]

E3S Web of Conferences, 2023
This work presents comparison of ternary combinational digital circuits that reduce energy consumption in low-power VLSI (Very Large Scale Integration) design.
C. Venkataiah, Y. Mallikarjuna Rao, Jayamma Manjula, M.K. Linga Murthy, M. Mahesh Kumar, Alzubaidi Laith H., Pandey Akhilesh   +6 more
doaj   +1 more source

Ternary combinational logic gate design based on tri-valued memristors

Frontiers in Physics, 2023
Traditional binary combinational logic circuits are generally obtained by cascading multiple basic logic gate circuits, using more components and complicated wiring.
Xiao-Jing Li, Xiao-Jing Li, Xiao-Yuan Wang, Xiao-Yuan Wang, Pu Li, Herbert H. C. Iu, Zhi-Qun Cheng   +6 more
doaj   +1 more source

Performance analysis of 4-bit ternary adder and multiplier using CNTFET for high speed arithmetic circuits [PDF]

E3S Web of Conferences, 2023
Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits.
C. Venkataiah, Y. Mallikarjuna Rao, Jayamma Manjula, S. Rambabu, M.K. Linga Murthy, Alzubaidi Laith H., Mishra Sanjay   +6 more
doaj   +1 more source

Design of ternary full-adder and full-subtractor using pseudo NCNTFETs

e-Prime: Advances in Electrical Engineering, Electronics and Energy, 2023
Now-a-days, the binary logic system has intensified by scaling the field effect transistor (FET). However, due to the effectiveness of scaling the FET, ternary logics became more popular.
SV RatanKumar, L Koteswara Rao, M Kiran Kumar   +2 more
doaj   +1 more source

Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders

IEEE Access, 2021
Multiple-Valued Logic systems present significant improvements in terms of energy consumption over binary logic systems. This paper proposes new ternary combinational digital circuits that reduce energy consumption in low-power nano-scale embedded ...
Jihad Mohamed Aljaam, Ramzi A. Jaber, Somaya Ali Al-Maadeed   +2 more
doaj   +1 more source

Design and Implementation of Ternary Logic Integrated Circuits by Using Novel Two-Dimensional Materials

Applied Sciences, 2019
With the approaching end of Moore’s Law (that the number of transistors in a dense integrated circuit doubles every two years), the logic data density in modern binary digital integrated circuits can hardly be further improved due to the physical ...
Mingqiang Huang, Xingli Wang, Guangchao Zhao, Philippe Coquet, Bengkang Tay   +4 more
doaj   +1 more source