Results 31 to 40 of about 84,742 (270)

Design and Implementation of Ternary Logic Circuits for VLSI Applications

International Journal of Innovative Technology and Exploring Engineering, 2020
This paper mainly concentrates on the design and implementation of ternary logic circuits. The ternary numeral system has its base as 3. Ternary logic will use three symbols, which are, 0,1 and 2.
G. Thrishala, K.Ragini
semanticscholar   +1 more source

From static ternary adders to high-performance race-free dynamic ones

The Journal of Engineering, 2015
This study explores the suitability of dynamic logic style in ternary logic. It presents high-performance dynamic ternary half and full adders, which are essential components in computer arithmetic.
Shirin Rezaie, Reza Faghih Mirzaee, Keivan Navi, Keivan Navi, Omid Hashemipour   +4 more
doaj   +1 more source

Transistor-tunnel-diode ternary-logic circuits

Electronics Letters, 1968
Two new basic circuits for ternary-logical operations are described. Analogue simulation and experimental measurements confirm that the switching speeds of the ternary circuits can be comparable with those in similar binary circuits. It is concluded that a marginal improvement in processing rate may be achieved with ternary logic using transistor ...
W.D. Ryan, H. Madany
openaire   +1 more source

Static Timing Analysis for Critical Path Identification in Ternary Logic Circuits

Iranian Journal of Electrical and Electronic Engineering, 2022
In this article, a critical path identification method is proposed for ternary logic circuits. The considered structure for the ternary circuits is based on 2:1 multiplexers.
S. Abolmaali
doaj  

A General Framework for Sound and Complete Floyd-Hoare Logics [PDF]

, 2008
This paper presents an abstraction of Hoare logic to traced symmetric monoidal categories, a very general framework for the theory of systems. Our abstraction is based on a traced monoidal functor from an arbitrary traced monoidal category into the ...
Arthan R., Blass A., Boulton R. J., Erik A. Mathiesen, Escardó M. H., Martin U., Paulo Oliva, Rob Arthan, Simpson A. K., Ursula Martin   +9 more
core   +1 more source

Design of ternary logic gates and circuits using GNRFETs [PDF]

IET Circuits, Devices & Systems, 2020
In this study, the design of digital logic gates and circuits in ternary logic is presented. The ternary logic is observed to be a better alternative to the traditional binary logic because it offers faster computations, smaller chip area, and lesser interconnects.
Badugu Divya Madhuri, Subramani Sunithamani   +1 more
openaire   +1 more source

Carbon Nanotube and Resistive Random Access Memory Based Unbalanced Ternary Logic Gates and Basic Arithmetic Circuits

IEEE Access, 2020
In this paper, the design of ternary logic gates (standard ternary inverter, ternary NAND, ternary NOR) based on carbon nanotube field effect transistor (CNTFET) and resistive random access memory (RRAM) is proposed.
Furqan Zahoor, Tun Zainal Azni Zulkifli, Farooq Ahmad Khanday, Sohiful Anuar Zainol Murad   +3 more
doaj   +1 more source

Breaking the Limits in Ternary Logic: An Ultra-Efficient Auto-Backup/Restore Nonvolatile Ternary Flip-Flop Using Negative Capacitance CNTFET Technology

IEEE Access, 2021
Despite the advantages of ternary logic, it has suffered from excessive transistor count and limited noise margin. This work proposes an ultra-efficient nonvolatile ternary flip-flop (FF) based on negative capacitance carbon nanotube field-effect ...
Mohammad Hossein Moaiyeri, Mohammad Khaleqi Qaleh Jooq, Alaaddin Al-Shidaifat, Hanjung Song   +3 more
doaj   +1 more source

Ultra-Low Energy CNFET-Based Ternary Combinational Circuits Designs

IEEE Access, 2021
The embedded systems, IoT (Internet of Things) devices, and portable electronic devices spread very quickly recently. Most of them depend on batteries to operate.
Ramzi A. Jaber, Jihad Mohamed Aljaam, Bilal N. Owaydat, Somaya Ali Al-Maadeed, Abdallah Kassem, Ali Massoud Haidar   +5 more
doaj   +1 more source

Analysis of Ternary logic arithmetic circuits

, 2023
{"references": ["1.\tSulochana, V., Venkataiah, C., Agrawal, S., & Singh, B. (2023). Novel Circuit Model of Multi-walled CNT Bundle Interconnects Using Multi-valued Ternary Logic. IETE Journal of Research, 69(3), 1328-1340.", "2.\tVenkataiah, C., Satya-Prakash, V. N. V., Mallikarjuna, K., & Prasad, T. J. (2019).
openaire   +1 more source