Results 271 to 280 of about 223,006 (306)
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Design of dual threshold voltages asynchronous circuits
Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08, 2008This paper introduces a framework for the minimization of leakage power consumption of asynchronous circuits via using dual threshold voltages technique. The utilized circuit model is an extended Timed Petri-Net which captures the dynamic behavior of the circuit.
Behnam Ghavami, Hossein Pedram
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An optimally self-biased threshold-voltage extractor
ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483), 2002A novel threshold-voltage extractor architecture is presented. A differential-difference transconductor (DDT) loop automatically biases the device-under-test in continuous time around the inflection point of the /spl radic/I/sub D/ vs. V/sub GS/ characteristics.
Siew Kuok Hoon, Ugur Çilingiroglu
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Threshold voltages for hyperbolic secant inversion pulses
NMR in Biomedicine, 1992AbstractSpin inversion produced by hyperbolic secant RF pulses is independent of pulse amplitude once a threshold value is exceeded. A semi‐empirical formula for these pulses has been derived by application of analytical solutions to the Bloch equations.
G S, Payne, M O, Leach
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Coping with Parametric Variation at Near-Threshold Voltages
IEEE Micro, 2013Near-threshold voltage computing (NTC) promises significant improvement in energy efficiency. Unfortunately, when compared to conventional, super-threshold voltage computing (STC), NTC is more sensitive to parametric variation. This results in not only slower and leakier cores, but also substantial speed and power differences between the cores in a ...
Ulya R. Karpuzcu +2 more
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A dual threshold voltage technique for glitch minimization
2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012), 2012We propose to use dual-threshold voltage (dual-Vth) assignment for glitch reduction. We present a heuristic algorithm address this problem. Experimental results on 6 ISCAS85 benchmark circuits implemented in a 65 nm industrial low power CMOS process report more than 16% of glitch reduction on average, and up to 41% for C432 benchmark circuit.
Mariem Slimani +2 more
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Modeling of threshold voltage of a quadruple gate transistor
Microelectronics Journal, 2011In this paper, a three dimensional analytical solution of electrostatic potential is presented for undoped (or lightly doped) quadruple gate MOSFET by solving 3-D Poisson's equation. It is shown that the threshold voltage predicted by the analytical solution is in close agreement with TCAD 3-D numerical simulation results.
Md. Gaffar +3 more
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A CMOS Threshold Voltage Monitoring Sensor
2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2023Konstantinos Moustakas +4 more
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Chinese Physics B, 2018
The impact of the variations of threshold voltage (V th) and hold voltage (V hold) of threshold switching (TS) selector in 1S1R crossbar array is investigated. Based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors, V th and V hold are extracted and their variations distribution expressions are obtained, which are
Yu-Jia Li +6 more
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The impact of the variations of threshold voltage (V th) and hold voltage (V hold) of threshold switching (TS) selector in 1S1R crossbar array is investigated. Based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors, V th and V hold are extracted and their variations distribution expressions are obtained, which are
Yu-Jia Li +6 more
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Threshold Voltage Scaling and Control
2009This chapter contains sections titled: Ion-Implanted Complementary MOS Transistors in Low-Voltage Circuits Trading Speed for Low Power by Choice of Supply and Threshold Voltages Limitation of CMOS Supply-Voltage Scaling by MOSFET Threshold-Voltage Variation ]]>
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The 1998 international conference on characterization and metrology for ULSI technology, 1998
R. J. Hillard +5 more
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R. J. Hillard +5 more
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