Results 71 to 80 of about 10,598 (239)

ON THE DESIGN OF NEW CMOS DO-OTA TOPOLOGIES PROVIDING HIGH OUTPUT IMPEDANCE AND EXTENDED LINEARITY RANGE

open access: yesElectrica, 2005
In this paper, new realization techniques to enhance the performance of the CMOS differential output transconductance amplifiers (DO-OTAs) are proposed by combining the high-performance input and output stages given in the literature.
Burçin Serter Ergün, H. Hakan Kuntman
doaj   +2 more sources

All-Printed Thin-Film Transistor Based on Purified Single-Walled Carbon Nanotubes with Linear Response

open access: yesJournal of Nanotechnology, 2011
We report an all-printed thin-film transistor (TFT) on a polyimide substrate with linear transconductance response. The TFT is based on our purified single-walled carbon nanotube (SWCNT) solution that is primarily consists of semiconducting carbon ...
Guiru Gu   +15 more
doaj   +1 more source

Twisted MoS2 Bilayers as Functional Elements in Memtransistors: Hysteresis, Optical Signatures, and Photocurrent Kinetics

open access: yesAdvanced Electronic Materials, EarlyView.
ABSTRACT Layered 2D materials are considered as promising for memristive applications due to their ultimate vertical scalability compared to conventional semiconductor films and pronounced hysteresis properties. Bias‐resolved Raman and Photoluminescence mapping is used to quantify strain from phonon shifts and carrier density from the exciton‐trion ...
Vladislav Kurtash   +4 more
wiley   +1 more source

GaSb Inversion-Mode PMOSFETs With Atomic-Layer-Deposited Al2O3 as Gate Dielectric

open access: yes, 2011
GaSb inversion-mode PMOSFETs with atomic-layer-deposited (ALD) Al2O3 as gate dielectric are demonstrated. A 0.75-mu m-gate-length device has a maximum drain current of 70 mA/mm, a transconductance of 26 mS/mm, and a hole inversion mobility of 200 cm(2)/V
Min Xu   +5 more
core   +2 more sources

A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces

open access: yesSensors, 2020
The paper presents an operational transconductance amplifier (OTA) with low transconductance (0.62–6.28 nS) and low power consumption (28–270 nW) for the low-frequency analog front-ends in biomedical sensor interfaces.
Jacek Jakusz   +4 more
doaj   +1 more source

Wood‐Based Bioelectronics: Lignosulfonate‐Based Conductive Biocomposites for Paper Organic Electrochemical Transistors

open access: yesAdvanced Electronic Materials, EarlyView.
Biodegradable wood‐based bioelectronics are realized by integrating poly (2,3‐ethylenedioxythiopene:lignosulfonate (PEDOT:LigS) as a mixed ionicelectronic channel in organic electrochemical transistors fabricated on paper substrates. The biocomposite exhibits high conductivity, biocompatibility, and strong transistor performance, while devices built on
Katharina Matura   +8 more
wiley   +1 more source

A CMOS transconductance-C filter technique for very high frequencies [PDF]

open access: yes, 1992
CMOS circuits for integrated analog filters at very high frequencies, based on transconductance-C integrators, are presented. First a differential transconductance element based on CMOS inverters is described.
Nauta, Bram
core   +1 more source

Extraction of oxide traps in III-V MOSFETs using RF transconductance measurements

open access: yes, 2013
We here present simulations of the effect of border traps on the behavior of a III-V FET's transconductance with respect to frequency. We also compare simulations with a recently developed analytical model for extracting the border trap distribution ...
Johansson, Sofia, Lind, Erik
core   +2 more sources

Transconductance as a probe of nonlocality of Majorana fermions [PDF]

open access: yesJournal of Physics: Condensed Matter, 2019
Abstract Each end of a Kitaev chain in topological phase hosts a Majorana fermion. Zero bias conductance peak is an evidence of Majorana fermion when the two Majorana fermions are decoupled. These two Majorana fermions are separated in space and this nonlocal aspect can be probed when the two are coupled. Crossed Andreev reflection is
openaire   +3 more sources

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

open access: yesAdvanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez   +10 more
wiley   +1 more source

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