Results 231 to 240 of about 11,438 (267)

Enhancing Fault Emulation of Transient Faults by Separating Combinational and Sequential Fault Propagation

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
We present a fault emulation environment capable of injecting single and multiple transient faults in sequential as well as combinational logic. It is used to perform fault injection campaigns during design verification of security circuits such as smart cards.
Ralph Nyberg, Johann Heyszl, Dietmar Heinz, Georg Sigl   +3 more
openaire   +1 more source

Model for Transient Fault Susceptibility of Combinational Circuits

Journal of Electronic Testing, 2004
Transient faults (TFs) are increasingly affecting microelectronic devices as their size decreases. During the design phase, the robustness of circuits for high reliability applications with respect to this kind of faults is generally validated through simulations.
OMANA, MARTIN EUGENIO, ROSSI, DANIELE, METRA, CECILIA   +2 more
openaire   +5 more sources

Transient Fault Induction Attacks on XTR

2004
At Crypto 2000, the public-key system XTR was introduced by Lenstra and Verheul. This system uses an efficient and compact method to represent subgroup elements. Application of XTR in cryptographic protocols, such as Diffie-Hellman key agreement, El Gamal encryption or DSA signature, greatly reduces the computational cost without compromising security.
Mathieu Ciet, Christophe Giraud 0001
openaire   +2 more sources

Novel transient fault hardened static latch

International Test Conference, 2003. Proceedings. ITC 2003., 2004
In this paper we analyze the effects of transient faults (TFs) affecting the internal nodes of conventional latch structures and we propose a new latch design which allows to tolerate such faults. In particular, we show that standard latches using back-to-back inverters for their positive feedback are very susceptible to glitches on their internal ...
Omana M., Rossi D., Metra C.
openaire   +2 more sources

Multilevel Ionizing-Induced Transient Fault Simulator

Information Security Journal: A Global Perspective, 2013
ABSTRACTThis paper presents a multilevel fault simulator for digital circuits. Single and multiple transient phenomena are examined at low level in order to model accurately single/multiple event transients at logic level. Multilevel simulation is used for precision of electrical modeling and the conciseness of the coarse grain gate-level modeling ...
Lu, Feng, Di Natale, Giorgio, Flottes, Marie-Lise, Rouzeyre, Bruno   +3 more
openaire   +3 more sources

Transient fault detection via simultaneous multithreading

ACM SIGARCH Computer Architecture News, 2000
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardware faults. Most commercial fault-tolerant computers use fully replicated hardware components to detect microprocessor faults.
Steven K. Reinhardt, Shubhendu S. Mukherjee   +1 more
openaire   +1 more source

Formal Development of Software for Tolerating Transient Faults

11th Pacific Rim International Symposium on Dependable Computing (PRDC'05), 2006
Transient faults constitute a wide-spread class of faults typical in control systems. These are faults that appear for some time during system operation and might disappear and reappear later. However, even by appearing for a short time, they might cause dangerous system errors.
Dubravka Ilic, Elena Troubitsyna
openaire   +1 more source

Method for evaluation of transient-fault detection techniques

Microelectronics Reliability, 2017
This work introduces a simulation-based method for evaluating the efficiency of detection techniques in identifying transient faults provoked in combinational logic blocks. Typical fault profiles are simulated in campaigns of injections that reproduce output scenarios of fault-affected combinational circuits.
Raphael Andreoni Camponogara Viera, Rodrigo Possamai Bastos, Jean-Max Dutertre, Philippe Maurine, Rodrigo Iga Jadue   +4 more
openaire   +2 more sources

Concurrent transient fault simulation for analog circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2003
This paper presents a novel concurrent fault simulation algorithm for nonlinear analog circuits. Between successive time steps in transient fault simulation, all faulty circuits in the fault list are simulated before the simulator proceeds to the next step. Four primary techniques, including fault grouping, fault ordering, state prediction, and reduced-
Junwei Hou, Abhijit Chatterjee
openaire   +2 more sources

Transient faults and network reliability

2004 IEEE Aerospace Conference Proceedings (IEEE Cat. No.04TH8720), 2005
This work develops a method for the quantitative analysis of network reliability in the presence of both permanent and transient faults. Even though transient noise is considered a common occurrence in networks, a survey of the literature reveals an emphasis on permanent faults.
openaire   +1 more source