Results 141 to 150 of about 11,441 (198)
Some of the next articles are maybe not open access.

Jitter-Based Reconstruction Of Transmission Line Pulse Using On-Chip Sensor

2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium, 2021
A technique for reconstruction of on-chip high frequency signals is demonstrated. The majority of the on-chip reconstruction methods based on subsampling technique are applicable to synchronized systems. This paper demonstrates a jitter-based subsampling
Bhuvnesh Narayanan   +3 more
semanticscholar   +1 more source

Transient analysis of latent damage formation in SMD capacitors by Transmission Line Pulsing (TLP)

Microelectronics Reliability, 2017
Abstract Latent defects were provoked in SMD capacitors by short TLP current pulses. Simultaneously the transient evolution of the device's charge was extracted to generate its Q(V) characteristics and to determine its capacitive behaviour during the transient current stress.
D. Helmut, G. Wachutka, G. Groos
openaire   +1 more source

Evaluation on ESD robustness of LTPS diode and TFT device by transmission line pulsing (TLP) technique

2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672), 2004
ESD robustness of Low Temperature Poly-Si (LTPS) diodes and TFT devices has been investigated in this paper. By using the Transmission Line Pulsing (TLP) techniques, the It2 (secondary breakdown current) of LTPS diodes and TFT devices were measured. To evaluate the ESD robustness of components for ESD protection, the shifts of breakdown voltage and cut-
null Ming-Dou Ker   +4 more
openaire   +1 more source

A New Method to Correlate Human Body Model and Transmission Line Pulse Based on RC Thermal Equivalent Model

IEEE Transactions on Electron Devices, 2020
This work proposes a new method to estimate the correlation between human body model (HBM) and transmission line pulse (TLP) based on RC thermal equivalent model to obtain the normalized critical temperature.
Yize Wang, Yuan Wang
semanticscholar   +1 more source

On-wafer measurement of the reverse-recovery time of integrated diodes by Transmission-Line-Pulsing (TLP)

Microelectronics Reliability, 2011
Abstract We present a new method for the on-wafer-characterisation for the reverse recovery behaviour of integrated diodes, which can perform on-wafer automated measurements over a wide range of different bias and pulsing conditions. The system is based on a Transmission-Line-Pulsing (TLP) technique and can be used to characterise diodes down to the
Martin Sauter   +3 more
openaire   +1 more source

Capacitively coupled transmission line pulsing cc-TLP––a traceable and reproducible stress method in the CDM-domain

Microelectronics Reliability, 2005
This paper describes a new test method called capacitively coupled transmission line pulsing cc-TLP. It is applied to different test circuits which were mounted on specially designed package emulators with a defined background capacitance. The test results are compared with the ESD thresholds obtained by CDM tests.
Heinrich Wolf   +3 more
openaire   +1 more source

An improved transmission line pulsing (TLP) setup for electrostatic discharge (ESD) testing in semiconductor devices and ICs

ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153), 2002
Transmission line pulsing (TLP) is a useful technique to characterize electrostatic discharge (ESD) events in semiconductor devices. The pulse waveforms generated by a typical TLP set-up, however, are often distorted and oscillatory. In this paper, a new and simple experimental set-up is developed to improve the shape of the TLP waveforms and thus to ...
J.C. Lee   +4 more
openaire   +1 more source

Investigation on the Validity of Holding Voltage in High-Voltage Devices Measured by Transmission-Line-Pulsing (TLP)

IEEE Electron Device Letters, 2008
Latch-up is one of the most critical issues in high-voltage (HV) ICs due to the high power-supply voltages. Because the breakdown junction of an HV device is easily damaged by the huge power generated from a DC curve tracer, the device immunity against latch-up is often referred to the transmission-line-pulsing (TLP)-measured holding voltage.
Wen-Yi Chen, Ming-Dou Ker, Yeh-Jen Huang
openaire   +1 more source

Investigation on ESD Robustness of 20-V GGNMOS and GDPMOS in 4H-SiC Process with 100-ns TLP Pulse

IEEE Workshop on Wide Bandgap Power Devices and Applications, 2023
The ESD robustness of 20-V GGNMOS and GDPMOS fabricated by the 4H-SiC process was investigated by the 100-ns transmission-line-pulse (TLP) pulse. The experimental results show that, under the test of breakdown mode, there is no correlation between the ...
Chao-Yang Ke, M. Ker
semanticscholar   +1 more source

Correlation limits between capacitively coupled transmission line pulsing (CC-TLP) and CDM for a large chip-on-flex assembly

2017 39th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2017
For the first time this correlation study compares air discharge CDM and contact-mode Capacitively Coupled Transmission Line Pulsing (CC-TLP) for a large chip-on-flex assembly e.g. for the Internet of Things (IOT) applications. Both ground planes overlap only part of the flexible substrate with long traces.
Johannes Weber   +4 more
openaire   +1 more source

Home - About - Disclaimer - Privacy