Results 121 to 130 of about 5,995,120 (145)
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Microelectronics Reliability, 2011
Abstract We present a new method for the on-wafer-characterisation for the reverse recovery behaviour of integrated diodes, which can perform on-wafer automated measurements over a wide range of different bias and pulsing conditions. The system is based on a Transmission-Line-Pulsing (TLP) technique and can be used to characterise diodes down to the
Martin Sauter +3 more
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Abstract We present a new method for the on-wafer-characterisation for the reverse recovery behaviour of integrated diodes, which can perform on-wafer automated measurements over a wide range of different bias and pulsing conditions. The system is based on a Transmission-Line-Pulsing (TLP) technique and can be used to characterise diodes down to the
Martin Sauter +3 more
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Transient analysis of latent damage formation in SMD capacitors by Transmission Line Pulsing (TLP)
Microelectronics Reliability, 2017Abstract Latent defects were provoked in SMD capacitors by short TLP current pulses. Simultaneously the transient evolution of the device's charge was extracted to generate its Q(V) characteristics and to determine its capacitive behaviour during the transient current stress.
Dennis Helmut +2 more
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Microelectronics Reliability, 2003
Abstract Electrostatic discharge events can degrade the electromigration (EM) reliability of devices. Transmission line pulsing stress analysis is used to evaluate electrostatic discharge robustness of copper (Cu) interconnects and the impact to EM performance.
Sherry Suat Cheng Khoo +2 more
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Abstract Electrostatic discharge events can degrade the electromigration (EM) reliability of devices. Transmission line pulsing stress analysis is used to evaluate electrostatic discharge robustness of copper (Cu) interconnects and the impact to EM performance.
Sherry Suat Cheng Khoo +2 more
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IEEE Electron Device Letters, 2008
Latch-up is one of the most critical issues in high-voltage (HV) ICs due to the high power-supply voltages. Because the breakdown junction of an HV device is easily damaged by the huge power generated from a DC curve tracer, the device immunity against latch-up is often referred to the transmission-line-pulsing (TLP)-measured holding voltage.
Wen-Yi Chen, Ming-Dou Ker, Yeh-Jen Huang
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Latch-up is one of the most critical issues in high-voltage (HV) ICs due to the high power-supply voltages. Because the breakdown junction of an HV device is easily damaged by the huge power generated from a DC curve tracer, the device immunity against latch-up is often referred to the transmission-line-pulsing (TLP)-measured holding voltage.
Wen-Yi Chen, Ming-Dou Ker, Yeh-Jen Huang
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2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672), 2004
ESD robustness of Low Temperature Poly-Si (LTPS) diodes and TFT devices has been investigated in this paper. By using the Transmission Line Pulsing (TLP) techniques, the It2 (secondary breakdown current) of LTPS diodes and TFT devices were measured. To evaluate the ESD robustness of components for ESD protection, the shifts of breakdown voltage and cut-
null Ming-Dou Ker +4 more
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ESD robustness of Low Temperature Poly-Si (LTPS) diodes and TFT devices has been investigated in this paper. By using the Transmission Line Pulsing (TLP) techniques, the It2 (secondary breakdown current) of LTPS diodes and TFT devices were measured. To evaluate the ESD robustness of components for ESD protection, the shifts of breakdown voltage and cut-
null Ming-Dou Ker +4 more
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2004 IEEE International Reliability Physics Symposium. Proceedings, 2004
The Cu metal interconnect under TLP stress can not be treated as the constant current stress. The increase in the metal interconnect length at GGNMOS drain can improve device's MM failure threshold but degrade device's HBM failure threshold and IT2.
J.H. Lee +7 more
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The Cu metal interconnect under TLP stress can not be treated as the constant current stress. The increase in the metal interconnect length at GGNMOS drain can improve device's MM failure threshold but degrade device's HBM failure threshold and IT2.
J.H. Lee +7 more
openaire +1 more source
ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153), 2002
Transmission line pulsing (TLP) is a useful technique to characterize electrostatic discharge (ESD) events in semiconductor devices. The pulse waveforms generated by a typical TLP set-up, however, are often distorted and oscillatory. In this paper, a new and simple experimental set-up is developed to improve the shape of the TLP waveforms and thus to ...
J.C. Lee +4 more
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Transmission line pulsing (TLP) is a useful technique to characterize electrostatic discharge (ESD) events in semiconductor devices. The pulse waveforms generated by a typical TLP set-up, however, are often distorted and oscillatory. In this paper, a new and simple experimental set-up is developed to improve the shape of the TLP waveforms and thus to ...
J.C. Lee +4 more
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2017 39th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2017
For the first time this correlation study compares air discharge CDM and contact-mode Capacitively Coupled Transmission Line Pulsing (CC-TLP) for a large chip-on-flex assembly e.g. for the Internet of Things (IOT) applications. Both ground planes overlap only part of the flexible substrate with long traces.
Johannes Weber +4 more
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For the first time this correlation study compares air discharge CDM and contact-mode Capacitively Coupled Transmission Line Pulsing (CC-TLP) for a large chip-on-flex assembly e.g. for the Internet of Things (IOT) applications. Both ground planes overlap only part of the flexible substrate with long traces.
Johannes Weber +4 more
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2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320), 2003
Electrostatic discharge robustness of an epitaxial-base pseudomorphic Silicon Germanium Heterojunction Bipolar Transistor (HBT) device with Carbon incorporation is shown for the first time. Experimental results show that incorporation of Carbon in the base of a SiGe HBT device improves power-to-failure variation by improved control of the base width ...
B. Ronan +5 more
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Electrostatic discharge robustness of an epitaxial-base pseudomorphic Silicon Germanium Heterojunction Bipolar Transistor (HBT) device with Carbon incorporation is shown for the first time. Experimental results show that incorporation of Carbon in the base of a SiGe HBT device improves power-to-failure variation by improved control of the base width ...
B. Ronan +5 more
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Electrostatic discharge sensitivity testing. Transmission line pulse (TLP). Component level
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