Results 11 to 20 of about 11,441 (198)
Transmission line pulse (TLP) as integrative method for the investigation of ultra-fast trapping mechanisms on high-k MIM [PDF]
This paper discusses the transmission line pulse (TLP) analysis, generally used for electrostatic discharge (ESD) device characterization, as high potential usable tool also for non-ESD structures. TLP technique, combined with DC and pulsed I-V characterization, is performed to study the contribution of trap states on current conduction in metal ...
Merlo, Luca +10 more
openaire +4 more sources
This study introduces a new modular multilevel inverter that can produce five levels of positive voltage using only six power switches and five DC voltage sources. The basic unit is composed of a single‐ and double‐source (SDS) unit. SDS reduces the number of power electronic components, such as the insulated gate bipolar transistors, freewheeling ...
Naser Fakhri +4 more
wiley +1 more source
Analyze Scalable Sudoku-Type DTSCR ESD Protection Array Structures in 22nm FDSOI
This paper reports the design and analysis of scalable Sudoku-type diode-triggered silicon-controlled rectifier (DTSCR) electrostatic discharge (ESD) protection structures fabricated in a foundry 22nm fully-depleted silicon-on-insulator (FDSOI ...
Cheng Li +5 more
doaj +1 more source
TCAD Simulation Study of ESD Behavior of InGaAs/InP Heterojunction Tunnel FETs
For the first time, we investigated the electrostatic discharge (ESD) behavior of an InGaAs/InP heterojunction tunneling field effect transistor (HTFET). The device structure in this study has a high on-state current without extra process steps.
Zhihua Zhu +5 more
doaj +1 more source
ESD Design Verification Aided by Mixed-Mode Multiple-Stimuli ESD Simulation
Electrostatic discharge (ESD) protection is a grand design challenge for complex ICs in advanced technologies. ESD simulation is indispensable to guide ESD protection designs.
Mengfu Di +3 more
doaj +1 more source
The power-rail electrostatic discharge (ESD) clamp circuits have been widely used in CMOS integrated circuits (ICs) to provide effective discharging paths for on-chip ESD protection design. Among all ESD events, the most serious threat is posed to ICs by
Yi-Chun Huang, Ming-Dou Ker
doaj +1 more source
Investigating Graphene gNEMS ESD Switch for Design Optimization
Traditional in-Silicon PN-junction-based on-chip electrostatic discharge (ESD) protection structures have inherent ESD-induced design overhead problems, including parasitic capacitance, leakage and Si area consumption.
Cheng Li +5 more
doaj +1 more source
Optimization of Tunnel Field-Effect Transistor-Based ESD Protection Network
The tunnel field-effect transistor (TFET) is a potential candidate for replacing the reverse diode and providing a secondary path in a whole-chip electrostatic discharge (ESD) protection network.
Zhihua Zhu +5 more
doaj +1 more source
Abstract Stomata are the gatekeepers of plant water use and must quickly respond to changes in plant water status to ensure plant survival under fluctuating environmental conditions. The mechanism for their closure is highly sensitive to disturbances in leaf water status, which makes isolating their response to declining water content difficult to ...
David Coleman +3 more
wiley +1 more source
Generation of Terahertz Radiation via the Transverse Thermoelectric Effect
Intense terahertz radiation generation via the transverse thermoelectric effect in layered conducting transition metal oxides is demonstrated . Ultrafast out‐of‐plane temperature gradients, induced by femtosecond laser pulses on thin films grown on off‐cut substrates, launch in‐plane thermoelectric currents leading to efficient THz emission.
Petar Yordanov +6 more
wiley +1 more source

