Results 51 to 60 of about 11,441 (198)

Transmission Line Pulse Testing and Analysis of Its Influencing Factors

open access: yes, 2015
Transmission line pulse (TLP) is a useful tool in immunity test of electrostatic discharge (ESD). The pulse width and rising time of TLP waveform is the key point of the anti-static interference test.
Xue Gu, Zhenguang Liang
semanticscholar   +1 more source

Fully Integrated GaN-on-Silicon Power-Rail ESD Clamp Circuit Without Transient Leakage Current During Normal Power-on Operation

open access: yesIEEE Journal of the Electron Devices Society
When more circuit functions are integrated into a single chip fabricated by the GaN-on-Silicon process, the need for on-chip electrostatic discharge (ESD) protection design becomes crucial to safeguard GaN integrated circuits (ICs).
Wei-Cheng Wang, Ming-Dou Ker
doaj   +1 more source

Transiente Charakterisierung aktiver leistungselektronischer Bauelemente im Pikosekunden-Bereich mittels neuer Transmission Line Pulsing (TLP) - Methoden

open access: yes, 2022
In dieser Arbeit wurden Transmission Line Pulsing (TLP) Verfahren – etablierte Werkzeuge zur transienten Charakterisierung von Halbleiterelementen im Zeitbereich – mit dem Ziel untersucht, schnellschaltende Bauelemente insbesondere im Gebiet der Leistungselektronik zu charakterisieren.
openaire   +1 more source

A study of topologies and protocols for fiber optic local area network [PDF]

open access: yes
The emergence of new applications requiring high data traffic necessitates the development of high speed local area networks. Optical fiber is selected as the transmission medium due to its inherent advantages over other possible media and the dual ...
Gerla, M., Rodrigues, P., Yeh, C.
core   +1 more source

Publication Only [PDF]

open access: yesHemasphere
HemaSphere, Volume 9, Issue S1, June 2025.
europepmc   +2 more sources

ESD characterization of planar InGaAs devices [PDF]

open access: yes
We present a comprehensive study of ESD reliability (TLP) on planar nMOSFETs with In0.53Ga0.47As as the channel material. Two types of traps are found during ESD stress.
Alian, A   +15 more
core  

Characterization of ESD protection structures for 65 nm CMOS technology [PDF]

open access: yes, 2022
ESD phenomena are well known to be extremely dangerous for microelectronic devices. This thesis deals with failures induced by ESD phenomena, starting from the description of main charging events up to the physics beyond the operation of different ...
Di Biccari, Leonardo
core  

Electrostatic Discharge Implantation to Improve Machine-Model ESD Robustness of Stacked NMOS in Mixed-Voltage I/O Interface Circuits [PDF]

open access: yes
A novel electrostatic discharge (ESD) implantation method is proposed to significantly improve machinemodel (MM) ESD robustness of NMOS device in stacked configuration (stacked NMOS).
Hsin-chyh Hsu   +2 more
core   +1 more source

Continuous and scalable polymer capsule processing for inertial fusion energy target shell fabrication using droplet microfluidics [PDF]

open access: yes, 2017
High specification, polymer capsules, to produce inertial fusion energy targets, were continuously fabricated using surfactant-free, inertial centralisation, and ultrafast polymerisation, in a scalable flow reactor.
Barrow, David   +3 more
core   +1 more source

MOSs-String-Triggered Silicon-Controlled Rectifier (MTSCR) ESD Protection Device for 1.8 V Application. [PDF]

open access: yesMicromachines (Basel), 2023
Chen R   +8 more
europepmc   +1 more source

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