Results 271 to 280 of about 22,809 (305)
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The SPARK 2.0 system-a special purpose vector processor with a VectorPASCAL compiler
Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences, 1992The paper describes the architecture of the SPARK 2.0 processor and introduces a compiler for VectorPASCAL. Features of the architecture are the flexible address generation during vector operations and the large memories closely connected to the functional units.
A. Formella +4 more
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A low-power vector processor using logarithmic arithmetic for handheld 3d graphics systems
ESSCIRC 2007 - 33rd European Solid-State Circuits Conference, 2007A low-power, high-performance 4-way 32-bit vector processor is developed for handheld 3D graphics systems. It contains a floating-point unified matrix, vector, and elementary function unit. By utilizing the logarithmic arithmetic, the unit achieves single-cycle throughput for all these operations except for the matrix-vector multiplication with 2-cycle
Byeong-Gyu Nam, Hoi-Jun Yoo
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Propagation of boundary effects in large systems on vector processors
Computer Physics Communications, 1986Abstract The treatment of a problem in which the total set of data is too large to fit into memory and the data sets far away from the boundary are too small to get a satisfactory vector length is described. The particular problem is one in lattice gauge theory, studying the influence of boundary conditions of a 4-dimensional lattice on plaquettes in
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Request Rank Determination With Respect to a Vector Criterion in Multi-Processor Systems
IFAC Proceedings Volumes, 1976Summary A method for processing grouped request in a multi-processor system is proposed. For the proposed servicing discipline, algorithms developed and its mathematical model is studied.
E.A. Trakhtengerts, B.A. Berezovsky
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Implementation of indirect vector control on an integrated digital signal processor-based system
IEEE Transactions on Energy Conversion, 1999This paper presents an implementation of indirect vector control of an induction machine on an integrated DSP (digital signal processor) system manufactured by dSPACE GmbH. The system integrates into a single board the computational power of a TMS320C31 DSP with extra peripherals needed in vector control application, and therefore requires minimal ...
M.N. Marwali, A. Keyhani, W. Tjanaka
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New Implementation Of G.723.1 On Vector Processor For Video Conferencing System
International Conference on Consumer Electronics, 1997This paper presents the real-time imlementation of the ITU G.723.1[ 1 J which is the standard speech coder for the video conferencing system (H.324). The implementation is realized using the Multimedia Signal Processor (MSP) which is the programmable SIMD (Single Instruction Multiple Data) processor with eight 32-bit, sixteen 16-bit, or thirty two 8 ...
null Sang-Min Lee, null Sangil Park
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Implementing the boundary contour system on a multi vector processor iPSC/2 HyperCube
International Joint Conference on Neural Networks, 1989The boundary contour system (BCS), a massively parallel neural network model designed to perform early vision tasks, is discussed. Its tasks include boundary detection and segmentation. An arrangement of short-range competition and long-range cooperation among orientation-sensitive cells ensures a rapid, active sharpening of boundaries, including ...
null Diamond, null Holden
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2005 IEEE Engineering in Medicine and Biology 27th Annual Conference, 2005
An important goal of functional genomics is to develop methods for determining ways in which individual actions of genes are integrated in the cell. One way of gaining insight into a gene's role in cellular activity is to study its expression pattern in a variety of circumstances and contexts, as it responds to its environment and to the action of ...
R, Martino, D E, Russ, C A, Johnson
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An important goal of functional genomics is to develop methods for determining ways in which individual actions of genes are integrated in the cell. One way of gaining insight into a gene's role in cellular activity is to study its expression pattern in a variety of circumstances and contexts, as it responds to its environment and to the action of ...
R, Martino, D E, Russ, C A, Johnson
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Computer Physics Communications, 1991
Abstract An automated version of the Verlet neighbor list algorithm in which the optimum neighbor list radius (SKIN) increases with the system size (N) shows an almost linear CPU time versus N dependence over the range ...
Ariel A. Chialvo, Pablo G. Debenedetti
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Abstract An automated version of the Verlet neighbor list algorithm in which the optimum neighbor list radius (SKIN) increases with the system size (N) shows an almost linear CPU time versus N dependence over the range ...
Ariel A. Chialvo, Pablo G. Debenedetti
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Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2002
The VLSI design of a one-chip vector processor (VP) for parallel digital signal processing (DSP) systems is described. The VP aims at a peak performance of 100 MFLOPS (32-b) for typical digital signal processing applications. To achieve this performance based on existing CMOS technology, a very-long-instruction-word-type pipeline architecture was used.
Hiroshi Nakada +4 more
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The VLSI design of a one-chip vector processor (VP) for parallel digital signal processing (DSP) systems is described. The VP aims at a peak performance of 100 MFLOPS (32-b) for typical digital signal processing applications. To achieve this performance based on existing CMOS technology, a very-long-instruction-word-type pipeline architecture was used.
Hiroshi Nakada +4 more
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