FPGA realization of four chaotic interference cases in a terrestrial trajectory model and application in image transmission. [PDF]
Estudillo-Valdez MA +4 more
europepmc +1 more source
Simultaneous Optimisation of Dynamic Power, Area and Delay in Behavioural Synthesis [PDF]
Concern over power dissipation coupled with the continuing rise in system size and complexity means that there is a growing need for high-level design tools capable of automatically optimising systems to take into account power dissipation, in addition ...
Williams, A.C. +2 more
core
(Note: In VHDL a comment is indicated by two dashes '--'. Also, by convention, reserved words are all in capitols.) [PDF]
this document, and except for synthesis, only the IEEE standard 9 value logic system (std_logic) will be used. It is more robust than the bit or bit_vector types and is the logic system used exclusively at Sanders.
Vhdl Design Units, Figure Simple
core
FPGAs Implementation of fast algorithms oriented to mp3 audio decompression
La ejecución de los algoritmos de descompresión de audio exige procesadores potentes con alto nivel de desempeño, sin embargo, dichos algoritmos no son apropiados para aplicaciones óptimas en dispositivos móviles.
Antonio Benavides +2 more
doaj
Automatisierte VHDL-Code-Generierung eines Delta-Sigma Modulators [PDF]
Im vorliegenden Beitrag wird eine automatische Generierung des VHDL-Codes eines Delta-Sigma Modulators präsentiert. Die Koeffizientenmultiplikation wird hierbei durch Bit-Serielle-Addition durchgeführt.
R. Spilka, T. Ostermann
doaj
Implementation of a motion estimation algorithm for Intel FPGAs using OpenCL. [PDF]
de Castro M +4 more
europepmc +1 more source
FEATURES OF OBFUSCATION OF VHDL-DESIGNS AND ITS COMPLEXITY EVALUATION METHODS
Lexical and functional obfuscation is formalized. Brief survey of methods of lexical obfuscation is given and their drawbacks are investigated when applied to specifications in VHDL language.
V. V. Sergeichik, A. A. Ivaniuk
doaj
An Automotive CD-Player Electro-Mechanics Fault Simulation Using VHDL-AMS [PDF]
Ruo Roch, Massimo +3 more
core +1 more source
Un método simple para pasar de un algoritmo a un modelo en VHDL [PDF]
The following paper describes a methodology to convert an algorithmic model into a VHDL, without having to describe directly the hardware where the algorithmic runs.
Muñoz, Gerardo
core
DesignCon 2004 VHDL-200X and the Future of VHDL [PDF]
VHDL is a critical language for RTL design and is a major component of the $200+ million RTL simulation market 1. Many users prefer to use VHDL for RTL design as the language continues to provide desired characteristics in design safety, flexibility and ...
Jim Lewis Synthworks +2 more
core

