Results 71 to 80 of about 35,017 (222)

EthVault: A Secure and Resource‐Conscious FPGA‐Based Ethereum Cold Wallet

IET Blockchain, Volume 5, Issue 1, January/December 2025.
This work presents EthVault, the first hardware‐based Ethereum hierarchical deterministic cold wallet, featuring FPGA implementations of key cryptographic algorithms for secure key generation. A novel ECC architecture resilient to side‐channel and timing attacks, along with an efficient child key derivation function, are introduced. Implementation on a
Joel Poncha Lemayian, Ghyslain Gagnon, Kaiwen Zhang, Pascal Giard   +3 more
wiley   +1 more source

Modeling with SpecCharts [PDF]

, 1990
SpecCharts is a language intended for system level description and synthesis. It is based on hierarchical state diagrams, posseses many constructs designed to facilitate ease of system level descriptions, and is simulatable via a translator from ...
Narayan, Sanjiv, Vahid, Frank
core  

Independent Task Scheduling in Multi‐Core Systems: A Hardware‐Based Approach for Optimising Energy and Thermal Efficiency

IET Cyber-Physical Systems: Theory &Applications, Volume 10, Issue 1, January/December 2025.
This paper introduces an online distributed hardware scheduler that outperforms similar schedulers in terms of performance, predictability, power and energy consumption and temperature management. Implementing the scheduler in hardware results in fewer clock cycles, lower latency and greater efficiency compared to software implementations.
Mohammadreza Saberikia, Hakem Beitollahi, Hamed Farbeh   +2 more
wiley   +1 more source

Synthesis from VHDL : Rockwell-counter case study [PDF]

, 1990
This report describes the design process and synthesis tools used in the UC Irvine CADLAB design environment to design a representative benchmark. The steps taken and rationale used in each stage of the design process are discussed.
Gajski, Daniel, Lis, Joseph, Wu, Allen, Zanden, Nels Vander   +3 more
core  

Constrained FCS‐MPC‐Based Current Controller for Voltage Source Converters: Application to Shunt Active Power Filters

IET Electric Power Applications, Volume 19, Issue 1, January/December 2025.
In this paper, a constrained FCS‐MPC based current controller is introduced for controlling shunt active power filters. In the proposed current controller, the objective function is same as used in the conventional FCS‐MPC and a switching frequency constraint is considered to reduce the average switching frequency. The results obtained from FPGA in the
Shahram Karimi, Hesam Seifinejad, Hassan Moradi, Hossein Bagheri, Siroos Hemmati   +4 more
wiley   +1 more source

Novel Area Optimization in FPGA Implementation Using Efficient VHDL Code

Jurnal Rekayasa Elektrika, 2012
A new novel method for area efficiency in FPGA implementation is presented. The method is realized through flexibility and wide capability of VHDL coding. This method exposes the arithmetic operations such as addition, subtraction and others.
. Zulfikar
doaj   +1 more source

Representation and matching of knowledge to design digital systems [PDF]

, 1988
A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks.
Jones, J. U., Shiva, S. G.
core   +1 more source

High‐efficiency multilevel inverter topology with minimal switching devices for enhanced power quality and reduced losses

IET Power Electronics, Volume 18, Issue 1, January/December 2025.
In this article, the authors introduced a novel MLI topology in symmetric and asymmetric configurations aiming to attain fewer power electronic devices for synthesizing more steps in the load voltage in contrast with conventional topologies. The proposed topology uses minimal on‐state switching devices leading to a diminution of power loss and voltage ...
Ramesh Jayaraman, Sandirasegarane Thamizharasan, Jeevarathinam Baskaran, Veerpratap Meena, Jitendra Bahadur, Vinay Kumar Jadoun   +5 more
wiley   +1 more source

Determining DfT Hardware by VHDL-AMS Fault Simulation for Biological Micro-Electronic Fluidic Arrays [PDF]

, 2005
The interest of microelectronic fluidic arrays for biomedical applications, like DNA determination, is rapidly increasing. In order to evaluate these systems in terms of required Design-for-Test structures, fault simulations in both fluidic and ...
Azais, F., Kerkhoff, H.G., Liu, H., Nouet, P., Richardson, A., Zhang, X.   +5 more
core   +2 more sources

Purification and properties of the very high density lipoprotein from the hemolymph of adult Triatoma infestans.

Journal of Lipid Research, 1989
The very high density lipoprotein (VHDL) of Triatoma infestans hemolymph from adult males has been isolated and purified by two-step density gradient ultracentrifugation. It appears to be homogeneous as judged by native polyacrylamide gel electrophoresis.
O J Rimoldi, J L Soulages, S M González, R O Peluffo, R R Brenner   +4 more
doaj   +1 more source