Results 51 to 60 of about 35,017 (222)
Simulating Building Blocks for Spikes Signals Processing [PDF]
In this paper we will explain in depth how we have used Simulink with the addition of Xilinx System Generation to design a simulation framework for testing and analyzing neuro-inspired elements for spikes rate coded signals processing.
Cerezuela Escudero, Elena +5 more
core +1 more source
Bioinspired Fully On‐Chip Learning Implemented on Memristive Neural Networks
This work proposes a memristive neural network based on van der Waals ferroelectric memristors and contrastive Hebbian learning, enabling fully on‐chip learning. The system achieves over 98% accuracy in pattern recognition with low power consumption (0.321 nJ/image) and high robustness, paving the way for efficient, bioinspired neuromorphic computing ...
Zhixing Wen +9 more
wiley +1 more source
VSS : a VHDL synthesis system [PDF]
This report describes a register transfer synthesis system that allows a designer to interact with the design process. The designer can modify the compiled design by changing the input description, selecting optimization and mapping strategies, or ...
Gajski, Daniel D., Lis, Joseph S.
core
Generating Logical Architectures from SysML Behavior Models
ABSTRACT Modeling solution‐neutral operating principles of system features as SysML behavior models enable systems engineers to specify reusable product features for a variety of similar products and to specify and document a product's functionality in an easy‐to‐understand manner.
Christian Granrath +4 more
wiley +1 more source
This work presents a secure telemedicine cryptosystem based on a novel 4D memristive chaotic oscillator and a Dispatched Gray Code Scrambler (DGCS). Implemented on FPGA, the system ensures power‐efficient encryption, making it suitable for real‐time medical image transmission in IoT healthcare environments.
Fritz Nguemo Kemdoum +3 more
wiley +1 more source
Security evaluation, NPCR + UACI results of 99.5978% and 33.4549% respectively, confirm the system is secure against statistical and differential attacks. Besides, the FPGA implementation achieves low power of 115 mW at a speed of 42.56 MHz. This makes it suitable for IoT applications where power and hardware resources are constrained. ABSTRACT In this
Fritz Nguemo Kemdoum +4 more
wiley +1 more source
Novel Area Optimization in FPGA Implementation Using Efficient VHDL Code
A new novel method for area efficiency in FPGA implementation is presented. The method is realized through flexibility and wide capability of VHDL coding. This method exposes the arithmetic operations such as addition, subtraction and others.
Zulfikar .
doaj +3 more sources
Chaos and chaotic systems, one of the most important work areas inrecent years, are used in areas such as cryptology and secure communication,industrial control, artificial neural networks, random number generators andimage processing.
İsmail Koyuncu, Halil İbrahim Şeker
doaj +1 more source
VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators. [PDF]
Nowadays, chaos generators are an attractive field for research and the challenge is their realization for the development of engineering applications.
Esteban Tlelo-Cuautle +3 more
doaj +1 more source
Synthesis from specifications : basic concepts [PDF]
The need has evolved for a synthesis tool at the computer system level. SpecSyn is one such tool. Basically, it will view the world as a set of chips communicating via protocols.
Gajski, Daniel D. +2 more
core

