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Computer Applications in Engineering Education, Volume 34, Issue 3, May 2026.ABSTRACT The transition from high‐level programming to assembly language constitutes a well‐documented pedagogical bottleneck in computer engineering curricula, particularly in large‐cohort laboratory settings where individualized scaffolding cannot scale.
Federico Garcia Crespi
wiley +1 more source
VHDL-AMS modeling of an automotive vibration isolation seating system [PDF]
, 2005 This paper presents VHDL-AMS model of an automotive vibration isolation seating system with an active electromechanical actuator. Five control algorithms for the actuator are implemented and their efficiencies are investigated by subjecting the system to
Wang, Leran, Kazmierski, Tom
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Topología Daisy Chain en FPGA para modernización naval: implementación y extensión con ARP
Revista ElektrónLas consolas de operaciones, interfaces de interacción humana implementadas en las Unidades de Superficie del Comando de la Flota Naval, facilitan la visualización de datos críticos y la gestión de sistemas mediante la entrada de comandos por parte de ...
Emiliano Sebastián Gallo +3 more
doaj +1 more source
Optimization of the symmetric encryption mode ECB dedicated to securing medical data [PDF]
Journal of Electrical and Electronics Engineering, 2021 Data security is a recurring problem to protected the private life of users, Data encryption is necessary but also delicate step to ensure at the same time speed and security of transmission and reception data, there are different models of cryptography ...
SEGHIRI Naouel +2 more
doaj
HMC‐DSR: An FPGA‐Accelerated Clustered Routing Protocol for Scalable and Energy‐Efficient MANETs
Engineering Reports, Volume 8, Issue 4, April 2026.FPGA‐based HMC‐DSR protocol enhances MANET routing with real‐time, energy‐efficient processing, reducing end‐to‐end delay by 20.7%. Power consumption decreased by 15.8%, making it ideal for energy‐constrained systems. Hardware resource optimization achieved a 31.2% reduction in flip‐flops and 27.4% in slice utilization. Throughput improvement of 19.4%,
Arvind Kumar +3 more
wiley +1 more source
Software methodologies for VHDL code static analysis based on flow graphs [PDF]
, 1996 At a high level of abstraction, the VHDL specification of the functionalities that a circuit shall perform is given by defining the behavioral model.
Cristiana Bolchini +5 more
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Molecular Ecology, Volume 35, Issue 6, March 2026.ABSTRACT The Western honey bee (Apis mellifera) is a globally important pollinator. Its health in natural and managed populations is compromised by numerous factors, including pesticides. Neonicotinoid pesticides are widely used even though they can cause a variety of detrimental effects.
Gursimran Toor +2 more
wiley +1 more source
Signal Processing for the Cluster Wideband Data Burst Mode
Journal of Geophysical Research: Space Physics, Volume 131, Issue 2, February 2026.Abstract The Wideband Data instrument is part of the Cluster spacecraft Wave Experiment Consortium. Its primary data path is a direct connection to the spacecraft data handling system providing real time downlink to the ground stations of the Deep Space Network and Panska Ves Observatory.
K. H. Yearby +2 more
wiley +1 more source
An FSM‐Enabled Reconfigurable Debugging Approach for Area‐Optimized FIR Filters on FPGA Platforms
IET Circuits, Devices &Systems, Volume 2026, Issue 1, 2026.This work introduces a novel method to improve hardware debugging efficiency and decrease computing time by employing a finite state machine (FSM)‐based reconfigurable buffer insertion strategy for optimizing field‐programmable gate array (FPGA) performance.
Murali Anumothu +8 more
wiley +1 more source
VHDL : coding and logic synthesis with Synopsys / [PDF]
, 2000 This book provides the most up-to-date coverage using the Synopsys program in the design of integrated circuits. The incorporation of "synthesis tools" is the most popular new method of designing integrated circuits for higher speeds covering smaller ...
Lee, Weng Fook.
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