Results 61 to 70 of about 12,898 (231)

Um modelo de controle de dispositivos através do barramento PCI: Core PCI [PDF]

, 2003
Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Ciência da Computação.Este trabalho é direcionado ao desenvolvimento de um protocolo PCI, o qual foi aqui denominado, Core PCI. O Core PCI é
Moretti, Alex Sandro
core  

Implementation of Dormand-Prince based chaotic oscillator designs in different IQ-Math number standards on FPGA

Sakarya Üniversitesi Fen Bilimleri Enstitüsü Dergisi, 2019
Chaos and chaotic systems, one of the most important work areas inrecent years, are used in areas such as cryptology and secure communication,industrial control, artificial neural networks, random number generators andimage processing.
İsmail Koyuncu, Halil İbrahim Şeker
doaj   +1 more source

Hardware Design for Secure Telemedicine Using A Novel Framework, A New 4D Memristive Chaotic Oscillator, and Dispatched Gray Code Scrambler

Engineering Reports, Volume 7, Issue 10, October 2025.
This work presents a secure telemedicine cryptosystem based on a novel 4D memristive chaotic oscillator and a Dispatched Gray Code Scrambler (DGCS). Implemented on FPGA, the system ensures power‐efficient encryption, making it suitable for real‐time medical image transmission in IoT healthcare environments.
Fritz Nguemo Kemdoum, Serge Raoul Dzonde Naoussi, Gideon Pagnol Ayemtsa Kuete, Justin Roger Mboupda Pone   +3 more
wiley   +1 more source

VHDL Descriptions for the FPGA Implementation of PWL-Function-Based Multi-Scroll Chaotic Oscillators. [PDF]

PLoS ONE, 2016
Nowadays, chaos generators are an attractive field for research and the challenge is their realization for the development of engineering applications.
Esteban Tlelo-Cuautle, Antonio de Jesus Quintas-Valles, Luis Gerardo de la Fraga, Jose de Jesus Rangel-Magdaleno   +3 more
doaj   +1 more source

On the Embedded of a Fast, Light and Robust Chaos‐Based Cryptosystem in NEXYS4 FPGA Card for Real Time Color Image Security (CBC in N‐FPGA‐RTCIP)

Engineering Reports, Volume 7, Issue 9, September 2025.
Security evaluation, NPCR + UACI results of 99.5978% and 33.4549% respectively, confirm the system is secure against statistical and differential attacks. Besides, the FPGA implementation achieves low power of 115 mW at a speed of 42.56 MHz. This makes it suitable for IoT applications where power and hardware resources are constrained. ABSTRACT In this
Fritz Nguemo Kemdoum, Gideon Pagnol Ayemtsa Kuete, Serge Raoul Dzonde Naoussi, Justin Roger Mboupda Pone, Wulfran Fendzi Mbasso   +4 more
wiley   +1 more source

Cloning and expression of the VHDL receptor from fat body of the corn ear worm, Helicoverpa zea

Journal of Insect Science, 2004
In Noctuids, storage proteins are taken up into fat body by receptor-mediated endocytosis. These include arylphorin and a second, structurally unrelated very high-density lipoprotein (VHDL).
Deryck R. Persaud, Norbert H. Haunerland
doaj  

CRC 8-bit Encoder-Decoder Component in FPGA using VHDL

Jurnal Elkomika, 2020
AbstrakCyclic Redundancy Check (CRC) adalah salah satu jenis dari deteksi kesalahan yang digunakan pada pengiriman data. CRC umumnya digunakan di jaringan digital dan perangkat penyimpanan untuk mendeteksi perubahan tidak disengaja pada data asli.
ANDHI RACHMAN SALEH, SUNNY ARIEF SUDIRO
doaj   +1 more source

Digital Predistorter Implementation for Wideband Power Amplifiers in New Generation Wireless Systems Based on a Low‐Complexity Volterra Series Model

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Volume 38, Issue 5, September/October 2025.
ABSTRACT In this article, we provide a novel, expanded, and adapted pruning approach for the Simplified Volterra Series (SVS) model that makes it applicable to a wider range of Power Amplifiers (PAs). The proposed Modified SVS (MSVS) model is then applied in a Digital Predistortion (DPD) architecture to linearize a 25 W Gallium Nitride (GaN) RF PA.
Haithem Rezgui, Ghalid Abib, Fatma Rouissi, Adel Ghazel   +3 more
wiley   +1 more source

Towards the neurocomputer: an investigation of VHDL neuron models [PDF]

, 2010
The investigation of neuron structures is an incredibly difficult and complex task that yields relatively low rewards in terms of information from biological forms (either animals or tissue).
Bailey, Julian A., Bailey, Julian A
core  

Technology independent optimization when implementing sparse systems of disjunctive normal forms of Boolean functions in ASIC

Informatika
Objectives. The problem of choosing the best methods and programs for circuit implementation as part of digital ASIC (Application-Specific Integrated Circuit) sparse systems of disjunctive normal forms (DNF) of completely defined Boolean functions is ...
P. N. Bibilo, S. N. Kardash
doaj   +1 more source