Results 151 to 160 of about 22,732 (218)
Some of the next articles are maybe not open access.
2008
The effort to protect information and the safety of communications has always been a major and most significant task . During transmission of confidential information, there is always the fear of their interception or stealing by non-authorized persons or enemies.
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The effort to protect information and the safety of communications has always been a major and most significant task . During transmission of confidential information, there is always the fear of their interception or stealing by non-authorized persons or enemies.
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Data compression using Shannon-fano algorithm implemented by VHDL
International Conference on Advances in Engineering & Technology Research, 2014Mahesh Vaidya +2 more
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2014
The structural realization of the PLD-based of a Xilinx type FPGA 32-bit module of division with a floating point appropriate to the standard IEEE-754, executed by using the behavioral description of algorithm by language VHDL is offered. The check of functioning of the module of division by a method of modeling in system ModelSim Xilinx Edition???MXE ...
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The structural realization of the PLD-based of a Xilinx type FPGA 32-bit module of division with a floating point appropriate to the standard IEEE-754, executed by using the behavioral description of algorithm by language VHDL is offered. The check of functioning of the module of division by a method of modeling in system ModelSim Xilinx Edition???MXE ...
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Automatic synthesis of VHDL hardware components from IOPT Petri net models
Annual Conference of the IEEE Industrial Electronics Society, 2013F. Pereira, L. Gomes
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VHDL 1076.1-analog and mixed-signal extensions to VHDL
Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, 1997Ernst Christen, Kenneth Bakalar
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FPGA Implementation of 8, 16 and 32 Bit LFSR with Maximum Length Feedback Polynomial Using VHDL
International Conference on Communication Systems and Network Technologies, 2012Amit Kumar Panda +2 more
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DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler
International Conference on Field-Programmable Logic and Applications, 2012R. Nane +5 more
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MODELISATION D'UN EMETTEUR A ETALEMENT DE SPECTRE PAR SEQUENCE DIRECTE EN VHDL-AMS
, 2013Ahed J Alkhatib, Majdi Al-Alawneh
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