Results 211 to 220 of about 12,898 (231)
Some of the next articles are maybe not open access.
A refinement calculus for VHDL
Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, 2002Peter T. Breuer +4 more
openaire +1 more source
Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, 2002
Gunther Lehmann +2 more
openaire +1 more source
Gunther Lehmann +2 more
openaire +1 more source
VHDL synthesis description portability: The need for Level synthesis subsets
Journal of Systems Architecture, 1996Eugenio Villar
exaly

