Results 81 to 90 of about 30,856 (159)

Parallel Lossless Compression of Raw Bayer Images on FPGA-Based High-Speed Camera. [PDF]

Sensors (Basel)
Regoršek Ž, Gorkič A, Trost A.
europepmc   +1 more source

VHDL synthesis system (VSS), release 3.0 : user's manual [PDF]

, 1991
Lis, Joseph, Ramachandran, Loganath
core  

An efficient method of modulo adder design for Digital Signal Processing applications. [PDF]

MethodsX
Kumar Singhal S, Kumar S, Kumar Patel S, Rao KA, Saxena G.   +4 more
europepmc   +1 more source

LMI-Based MPC Design Applied to the Single-Phase PWM Inverter with LC Filter under Uncertain Parameters. [PDF]

Sensors (Basel)
Andrea CQ, Batista EA, Pereira LFDSC, de Brito MAG, de Souza GV.   +4 more
europepmc   +1 more source

Real-Time RISC-V-Based CAN-FD Bus Diagnosis Tool. [PDF]

Micromachines (Basel), 2023
Popovici CA, Stan A.
europepmc   +1 more source

Improving dependability with low power fault detection model for skinny-hash. [PDF]

PLoS One
Arvind Barge S, Mary GI.
europepmc   +1 more source

Performance analysis of multiple input single layer neural network hardware chip. [PDF]

Multimed Tools Appl, 2023
Goel A, Goel AK, Kumar A.
europepmc   +1 more source

UWB Receiver Design and Two-Way-Ranging Simulation using VHDL-AMS [PDF]

, 2006
Casu, Mario Roberto, Crepaldi, Marco, Graziano, Mariagrazia, Zamboni, Maurizio   +3 more
core   +1 more source

Exploring memory synchronization and performance considerations for FPGA platform using the high-abstracted OpenCL framework: Benchmarks development and analysis. [PDF]

PLoS One
Almomany A, Jarrah A, Sutcu M.
europepmc   +1 more source

ANN-based chaotic PRNG in the novel jerk chaotic system and its application for the image encryption via 2-D Hilbert curve. [PDF]

Sci Rep
Sambas A, Zhang X, Moghrabi IAR, Vaidyanathan S, Benkouider K, Alçın M, Koyuncu İ, Tuna M, Sulaiman IM, Mohamed MA, Johansyah MD.   +10 more
europepmc   +1 more source