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Virtual prototypes in usability testing
Proceedings of the 34th Annual Hawaii International Conference on System Sciences, 2005This paper describes a study of a three-dimensional virtual prototype intended for usability resting and concept validation over the Internet. A virtual reality modeling language (VRML)-model of a fictive mobile phone concept with simulated interaction functionality was tested for usability following two approaches.
Kari Kuutti +6 more
openaire +2 more sources
Enabling Continuous Software Engineering for Embedded Systems Architectures with Virtual Prototypes
Lecture Notes in Computer Science, 2018Thomas Kuhn +2 more
exaly +2 more sources
An Effective Methodology for Integrating Concolic Testing with SystemC-based Virtual Prototypes
Design, Automation and Test in Europe, 2021In this paper we propose an effective methodology for integrating Concolic Testing (CT) with SystemC-based Virtual Prototypes (VPs) for verification of embedded SW binaries.
Sören Tempel, V. Herdt, R. Drechsler
semanticscholar +1 more source
Evaluation of customer impressions using virtual prototypes in the internet environment
International Journal of Industrial Ergonomics, 2011Myung Hwan Yun, Mark R Lehto
exaly +2 more sources
Dynamic Information Flow Tracking for Embedded Binaries using SystemC-based Virtual Prototypes
Design Automation Conference, 2020Avoiding security vulnerabilities is very important for embedded systems. Dynamic Information Flow Tracking (DIFT) is a powerful technique to analyze SW with respect to security policies in order to protect the system against a broad range of security ...
Pascal Pieper +3 more
semanticscholar +1 more source
ACM Great Lakes Symposium on VLSI, 2020
Extensive verification of embedded SW is very important to avoid errors and security vulnerabilities. Therefore, mainly simulation-based methods are employed that leverage Virtual Prototypes (VPs) for SW execution early in the design flow.
V. Herdt +4 more
semanticscholar +1 more source
Extensive verification of embedded SW is very important to avoid errors and security vulnerabilities. Therefore, mainly simulation-based methods are employed that leverage Virtual Prototypes (VPs) for SW execution early in the design flow.
V. Herdt +4 more
semanticscholar +1 more source
Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes*
Design, Automation and Test in Europe, 2020RISC-V is gaining huge popularity in particular for embedded systems. Recently, a SystemC-based Virtual Prototype (VP) has been open sourced to lay the foundation for providing support for system-level use cases such as design space exploration, analysis
V. Herdt, Daniel Große, R. Drechsler
semanticscholar +1 more source
Automatic generation of virtual prototypes
Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004., 2004Pavle Belanovic +4 more
openaire +3 more sources