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On the Viterbi decoding algorithm
IEEE Transactions on Information Theory, 1969A new interpretation of the Viterbi decoding algorithm based on the state-space approach to dyamical systems is presented. In this interpretation the optimum decoder solves a generalized regulator control problem by dynamic programming techniques.
J Omura
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Truncation Error Probability in Viterbi Decoding
IEEE Transactions on Communications, 1977An upper bound on the bit error probability due to truncation of the path length in Viterbi decoding is obtained for any given convolutional code. This bound is then used to determine the path length at which the additional error probability due to truncation becomes negligible compared to the maximum likelihood decoding error probability.
Daniel J Costello
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IEEE Transactions on Circuits and Systems II: Express Briefs, 2005
The problem of survival memory management of a Viterbi decoder (VD) was solved by introducing a novel pointer implementation for the register exchange method, where a pointer is assigned to each row of memory in the survivor memory unit (SMU). The content of the pointer which points to one row of memory is altered to point to another row of memory ...
Dalia A. El-Dib, Mohamed I. Elmasry
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The problem of survival memory management of a Viterbi decoder (VD) was solved by introducing a novel pointer implementation for the register exchange method, where a pointer is assigned to each row of memory in the survivor memory unit (SMU). The content of the pointer which points to one row of memory is altered to point to another row of memory ...
Dalia A. El-Dib, Mohamed I. Elmasry
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2008 Fourth International Conference on Natural Computation, 2008
Convolutional codes are widely used in many communication systems due to their excellent error-control performance. High-speed Viterbi decoders for convolutional codes are of great interest in high-speed applications. A high-speed (2, 1, 6) Viterbi decoder is presented in this paper, which is based on parallel Radix-4 architecture and bit-level carry ...
Qing Li +3 more
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Convolutional codes are widely used in many communication systems due to their excellent error-control performance. High-speed Viterbi decoders for convolutional codes are of great interest in high-speed applications. A high-speed (2, 1, 6) Viterbi decoder is presented in this paper, which is based on parallel Radix-4 architecture and bit-level carry ...
Qing Li +3 more
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A parallel Viterbi decoding algorithm
Concurrency and Computation: Practice and Experience, 2001AbstractIn this paper we express the Viterbi algorithm as a matrix–vector reduction in which multiplication is replaced by addition and addition by minimization. The resulting algorithm is then readily parallelized in a form suitable for implementation on a systolic processor array.
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Array Processors for Viterbi Decoder
2005 2nd International Symposium on Wireless Communication Systems, 2005Wireless receivers are often characterized as portable and battery operated. As such, they are bound by a tight set of constraints such as power consumption, area usage, and throughput speed. Parallel implementation of operations increases the speed of computation without an undue increase in lock frequency.
Appaya Devaraj Devaraj, Nastooh Avessta
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