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2008 Fourth International Conference on Natural Computation, 2008
Convolutional codes are widely used in many communication systems due to their excellent error-control performance. High-speed Viterbi decoders for convolutional codes are of great interest in high-speed applications. A high-speed (2, 1, 6) Viterbi decoder is presented in this paper, which is based on parallel Radix-4 architecture and bit-level carry ...
Qing Li +3 more
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Convolutional codes are widely used in many communication systems due to their excellent error-control performance. High-speed Viterbi decoders for convolutional codes are of great interest in high-speed applications. A high-speed (2, 1, 6) Viterbi decoder is presented in this paper, which is based on parallel Radix-4 architecture and bit-level carry ...
Qing Li +3 more
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List Viterbi decoding algorithms with applications
IEEE Transactions on Communications, 1994A list Viterbi decoding algorithm (LVA) produces a rank ordered list of the L globally best candidates after a trellis search. The authors present two such algorithms, (i) a parallel LVA that simultaneously produces the L best candidates and (ii) a serial LVA that iteratively produces the k/sup th/ best candidate based on knowledge of the previously ...
N Seshadri, C -E W Sundberg
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Array Processors for Viterbi Decoder
2005 2nd International Symposium on Wireless Communication Systems, 2005Wireless receivers are often characterized as portable and battery operated. As such, they are bound by a tight set of constraints such as power consumption, area usage, and throughput speed. Parallel implementation of operations increases the speed of computation without an undue increase in lock frequency.
Appaya Devaraj Devaraj, Nastooh Avessta
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Feedforward Architectures for Parallel Viterbi Decoding
Journal of VLSI signal processing systems for signal, image and video technology, 1991The Viterbi-Algorithm (VA) is a common application of dynamic programming. The algorithm contains a nonlinear feedback loop (ACS-feedback, ACS: add-compare-select) which is the bottleneck in high data rate implementations. In this paper we show that, asymptotically, the ACS-feedback no longer has to be processed recursively, i.e., there is no feedback.
Gerhard P. Fettweis, Heinrich Meyr
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2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, 2012
An all optical Viterbi decoder on a silicon chip was designed. The device is composed of an optical memory cell and two interfering input arms that use QPSK modulation to encode the incoming bits. The device has a shape of a ring resonator with a size of just a few micrometers and relies on the coupling of modes. Data processing of a few picoseconds is
Ted Frumkin, Amihai Meiri, Zeev Zalevsky
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An all optical Viterbi decoder on a silicon chip was designed. The device is composed of an optical memory cell and two interfering input arms that use QPSK modulation to encode the incoming bits. The device has a shape of a ring resonator with a size of just a few micrometers and relies on the coupling of modes. Data processing of a few picoseconds is
Ted Frumkin, Amihai Meiri, Zeev Zalevsky
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An effective simplifying scheme for viterbi decoder
IEEE 60th Vehicular Technology Conference, 2004. VTC2004-Fall. 2004, 1991A new reduced-state decoding method is presented. The method constructs state-sets, then classifies, compares, and selects states through certain rules based on a Viterbi algorithm (VA). The decoder complexity is reduced to increasing linearly with constraint-length, as compared to the VA whose complexity increases exponentially with constraint-length.
Peng Zhang, Guangguo Bi, Xiaohu You 0001
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A parallel Viterbi decoding algorithm
Concurrency and Computation: Practice and Experience, 2001AbstractIn this paper we express the Viterbi algorithm as a matrix–vector reduction in which multiplication is replaced by addition and addition by minimization. The resulting algorithm is then readily parallelized in a form suitable for implementation on a systolic processor array.
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An artificial neural net Viterbi decoder
IEEE Transactions on Communications, 1996The Viterbi algorithm is a maximum likelihood means for decoding convolutional codes and has thus played an important role in applications ranging from satellite communications to cellular telephony. In the past, Viterbi decoders have usually been implemented using digital circuits.
Xiao-an Wang, Stephen B. Wicker
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Memory Management in a Viterbi Decoder
IEEE Transactions on Communications, 1981Management of the memory contents in a Viterbi decoder is a major design problem for both hardware and software realizations. In a naive implementation, every bit in the memory must be changed (read, modified, and rewritten) for each message bit decoded, and, in addition, some double buffering is required.
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A new transform algorithm for Viterbi decoding
IEEE Transactions on Communications, 1990Implementation of the Viterbi decoding algorithm has attracted a great deal of interest in many applications, but the excessive hardware/time consumption caused by the dynamic and backtracking decoding procedures make it difficult to design efficient VLSI circuits for practical applications.
Kuei-Ann Wen +2 more
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