Results 51 to 60 of about 120,677 (152)

Low Power and Energy‐Efficient Design of MTJ/FinFET Circuits

open access: yesEngineering Reports, Volume 8, Issue 3, March 2026.
This work begins by outlining the fundamental concepts of MTJs, FinFETs, and the conventional hybrid CMOS/MTJ framework. It then explains the operating mechanism and configuration of the proposed STT‐MTJ/FinFET‐based OR logic gate. The final sections present the simulation outcomes and analyze the influence of FinFET fin variation.
Pillem Ramesh, Atul S. M. Tripathi
wiley   +1 more source

ECG Authentication Method Based on Parallel Multi-Scale One-Dimensional Residual Network With Center and Margin Loss

open access: yesIEEE Access, 2019
To enhance the security level of digital information, the biometric authentication method based on Electrocardiographic (ECG) is gaining increasing attention in a wide range of applications.
Yifan Chu, Haibin Shen, Kejie Huang
doaj   +1 more source

k-way Hypergraph Partitioning via n-Level Recursive Bisection

open access: yes, 2015
We develop a multilevel algorithm for hypergraph partitioning that contracts the vertices one at a time. Using several caching and lazy-evaluation techniques during coarsening and refinement, we reduce the running time by up to two-orders of magnitude ...
Henne, Vitali   +5 more
core   +1 more source

Universality for Graphs of Bounded Degeneracy

open access: yesRandom Structures &Algorithms, Volume 68, Issue 2, March 2026.
ABSTRACT Given a family ℋ$$ \mathscr{H} $$ of graphs, a graph G$$ G $$ is called ℋ$$ \mathscr{H} $$‐universal if G$$ G $$ contains every graph of ℋ$$ \mathscr{H} $$ as a subgraph. Following the extensive research on universal graphs of small size for bounded‐degree graphs, Alon asked what is the minimum number of edges that a graph must have to be ...
Peter Allen   +2 more
wiley   +1 more source

Carbon Nanotube Based Variation Tolerant Low Power Cache Memory for 5G Networks [PDF]

open access: yesIranian Journal of Electrical and Electronic Engineering
The overall performance of any integrated circuit is defined by its proper memory design, as it is a mandatory and major block which requires more area and power.
Kavitha Manickam   +7 more
doaj  

Copper Catalyzed Anisotropic Dissolution of Silicon in HF–HCl Solutions: Metal‐Assisted Chemical Etching Without Additional Oxidant

open access: yesEuropean Journal of Inorganic Chemistry, Volume 29, Issue 5, 9 February 2026.
Metal‐assisted chemical etching without an oxidant? We report an unexpected Cu2+‐catalyzed anisotropic etching of silicon in HF–HCl solutions. Despite the low redox potential of Cu2+, pyramidal surface structures are generated without a distinctive additional oxidizing agent.
Florian Honeit   +5 more
wiley   +1 more source

An interactive multimedia learning environment for VLSI built with COSMOS [PDF]

open access: yes, 2002
This paper presents Bigger Bits, an interactive multimedia learning environment that teaches students about VLSI within the context of computer electronics. The system was built with COSMOS (Content Oriented semantic Modelling Overlay Scheme), which is a
Agius, HW, Angelides, MC
core   +1 more source

Bioelectronic Technology for Nutritional Research—a Novel In Vitro Platform for a Better Understanding of Human Gut Barrier Absorption

open access: yesAdvanced Biology, Volume 10, Issue 2, February 2026.
This is the first study to demonstrate that the e‐transmembrane gut model provides more accurate physiological predictions than conventional cell culture inserts when tested by the dietary compound butyrate. The bioelectronic e‐transmembrane platform integrates technological and biological optimizations, enabling the hosting of a complex human gut in ...
Verena Stoeger   +12 more
wiley   +1 more source

Fault‐tolerant quantum implementation of conventional decoder logic with enable input

open access: yesIET Circuits, Devices and Systems, 2021
Decoherence is the greatest obstacle to the physical realization of scalable quantum computer, jeopardises coherent superposition of the qubit, and makes qubit extremely fragile.
Laxmidhar Biswal   +2 more
doaj   +1 more source

VLSI architecture for a Reed-Solomon decoder [PDF]

open access: yes, 1992
A basic single-chip building block for a Reed-Solomon (RS) decoder system is partitioned into a plurality of sections, the first of which consists of a plurality of syndrome subcells each of which contains identical standard-basis finite-field ...
Hsu, In-Shek, Truong, Trieu-Kie
core   +1 more source

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