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A low-power buffer-assisted 14T ternary SRAM. [PDF]

open access: yesSci Rep
Haq SU   +4 more
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Cerebral blood flow monitoring using a deep learning implementation of the two-layer diffuse correlation spectroscopy analytical model with a 512 × 512 SPAD array. [PDF]

open access: yesNeurophotonics
Pan M   +10 more
europepmc   +1 more source
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VLSI design process

Proceedings of the 1985 ACM thirteenth annual conference on Computer Science - CSC '85, 1985
This paper presents a review of the computer-aided design of VLSI devices. For illustrative purposes, the design methodology is modeled as an idealized two-level process. In the first level, known as the functional level, the requirements of the device are converted into logic description and tests are generated.
Vishwani D. Agrawal, Samuel H. C. Poon
openaire   +2 more sources

Architecture and VLSI design of a VLSI neural signal processor

1993 IEEE International Symposium on Circuits and Systems, 2002
A chip based on a scalable parallel systolic VLSI architecture has been designed for executing the compute-bound algorithmic primitives used by search and learning algorithms in neural networks and low level signal processing. The signal processor executes the algorithmic primitives and shared by all neural nets.
Ulrich Ramacher   +3 more
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Masterimage approach to VLSI design

Computer, 1983
The rapid development of semiconductor technology and the increasing complexity of VLSI chips have prompted a wide range of design approaches. Among them is one called the masterimage method, which is somewhere between the unconstrained approach, in which the designer has essentially total freedom, and the constrained approach, typified by the gate ...
Richard L. Donze, George Sporzynski
openaire   +2 more sources

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