Results 171 to 180 of about 9,664,784 (224)

Interconnect-dominated VLSI design

Proceedings 20th Anniversary Conference on Advanced Research in VLSI, 1999
This paper demonstrates the problems long, lossy wires pose for VLSI design as devices shrink to deep submicron dimensions. The degree to which both repeater insertion and reverse scaling of wire sizes are required to meet GHz clock frequency projections are estimated using a detailed wire distribution and a detailed processor model (RIPE).
P. Ghosh, Ramon Mangaser, C. Mark, Kenneth Rose   +3 more
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Design of VLSI systems

2005
VLSI chips have become an important part in the design of many large electronic systems. The growing complexity of VLSI chips creates a need for improved design methodologies and more powerful CAD environments.
openaire   +2 more sources

Data framework for VLSI design

1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers, 2002
The authors present a design automation framework (DAF) implementation that was developed in an advanced full custom IC design environment at Motorola Semiconductor Israel. This framework, named TDF (Tools and Data Framework), operates in a large-scale multi-user, multi-node environment.
Amir Milo, Smadar Nehab
openaire   +1 more source

A VLSI Design Verification Strategy

IBM Journal of Research and Development, 1982
With the ever-increasing density, development cost, and turn-around time of VLSI chips it becomes increasingly important to have a design verification methodology which enables first-pass chips to be fully functional. The strategy discussed in this paper exploits the best attributes of the two traditional methods of design verification (i.e., software ...
Arnold S. Tran, Richard A. Forsberg, Jack C. Lee   +2 more
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Exploiting hierarchy in VLSI design

1986
Recently design systems have been developed, that consider hierarchical circuit design not only as a means for more concise circuit specification but as a basis of more efficient design analysis and optimization. Hierarchical tools are most abundant in the area of artwork analysis, but they also occur in other areas such as compaction, layout, and ...
openaire   +2 more sources

Multiobjective search in VLSI design

Proceedings of 7th International Conference on VLSI Design, 2002
Many optimization problems in VLSI design involve multiple, conflicting and non-commensurate objectives. The multiobjective approach, which models each objective by a scalar-valued criterion and attempts to find all non-dominated solutions, is a natural and efficient alternative to the conventional practice of combining all objectives into a single ...
Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti 0001, S. C. De Sarkar   +3 more
openaire   +2 more sources

Genetic design of VLSI-layouts

1st International Conference on Genetic Algorithms in Engineering Systems: Innovations and Applications (GALESIA), 1995
A genetic algorithm for the physical design of VLSI-chips is presented. The algorithm simultaneously optimizes the placement of the cells with the total routing. During the placement the detailed routing is done, while the global routes are optimized by the genetic algorithm.
openaire   +1 more source

Algorithms and Heuristics in VLSI Design

2002
The increasing complexity of nowadays VLSI designs makes it hard up to impossible to check their correctness by using validation methods like simulation. Therefore there is is a growing demand for formal verification methods in VLSI design and verification.
Christoph Meinel, Christian Stangier
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A VLSI Design for Neuromorphic Computing

2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016
Dynamic Adaptive Neural Network Arrays (DANNAs) are neuromorphic systems that exhibit spiking behaviors and can be designed using evolutionary optimization. Array elements are rapidly reconfigurable and can function as either neurons, synapses or fan-out elements with programmable interconnections and parameters. Currently, DANNAs are implemented using
Mark E. Dean, Christopher Daffron
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On squashing hierarchical designs [VLSI]

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1995
The problem of partially expanding a hierarchical VLSI design is examined, with the goal of reducing the number of levels of hierarchy while incurring minimal design-size expansion. While the general problem appears NP-hard, an important special case is considered, where the number of levels of hierarchy is reduced by one.
openaire   +1 more source