Results 181 to 190 of about 13,582,659 (253)

INVITED: A Modular Digital VLSI Flow for High-Productivity SoC Design

Design Automation Conference, 2018
A high-productivity digital VLSI flow for designing complex SoCs is presented. The flow includes high-level synthesis tools, an object-oriented library of synthesizable SystemC and C++ components, and a modular VLSI physical design approach based on fine-
Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, J. Emer, Matthew R. Fojtik, Alicia Klinefelter, Michael Pellauer, N. Pinckney, Y. Shao, S. Srinath, Christopher Torng, S. Xi, Yanqing Zhang, B. Zimmer   +14 more
semanticscholar   +1 more source

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
Placement for very large-scale integrated (VLSI) circuits is one of the most important steps for design closure. We propose a novel GPU-accelerated placement framework DREAMPlace, by casting the analytical placement problem equivalently to training a ...
Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan   +7 more
semanticscholar   +1 more source

Masterimage approach to VLSI design

Computer, 1983
The rapid development of semiconductor technology and the increasing complexity of VLSI chips have prompted a wide range of design approaches. Among them is one called the masterimage method, which is somewhere between the unconstrained approach, in which the designer has essentially total freedom, and the constrained approach, typified by the gate ...
Richard L. Donze, George Sporzynski
openaire   +1 more source

VLSI Design

VLSI (Very Large Scale Integration) design is the process of creating integrated circuits by integrating millions or even billions of transistors onto a single semiconductor chip. It forms the backbone of modern electronic devices such as computers, smartphones, and embedded systems.
Ms. P. Muthumari, Mrs. P. Anandavalli, Mrs. M. P. Sasirekha, Mrs. R. Sandhiya, Ms. Selciya Selvan   +4 more
openaire   +3 more sources

Interconnect-dominated VLSI design

Proceedings 20th Anniversary Conference on Advanced Research in VLSI, 1999
This paper demonstrates the problems long, lossy wires pose for VLSI design as devices shrink to deep submicron dimensions. The degree to which both repeater insertion and reverse scaling of wire sizes are required to meet GHz clock frequency projections are estimated using a detailed wire distribution and a detailed processor model (RIPE).
P. Ghosh, Ramon Mangaser, C. Mark, Kenneth Rose   +3 more
openaire   +1 more source

Data framework for VLSI design

1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers, 2002
The authors present a design automation framework (DAF) implementation that was developed in an advanced full custom IC design environment at Motorola Semiconductor Israel. This framework, named TDF (Tools and Data Framework), operates in a large-scale multi-user, multi-node environment.
Amir Milo, Smadar Nehab
openaire   +1 more source

Multiobjective search in VLSI design

Proceedings of 7th International Conference on VLSI Design, 2002
Many optimization problems in VLSI design involve multiple, conflicting and non-commensurate objectives. The multiobjective approach, which models each objective by a scalar-valued criterion and attempts to find all non-dominated solutions, is a natural and efficient alternative to the conventional practice of combining all objectives into a single ...
Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti 0001, S. C. De Sarkar   +3 more
openaire   +1 more source

A VLSI Design Verification Strategy

IBM Journal of Research and Development, 1982
With the ever-increasing density, development cost, and turn-around time of VLSI chips it becomes increasingly important to have a design verification methodology which enables first-pass chips to be fully functional. The strategy discussed in this paper exploits the best attributes of the two traditional methods of design verification (i.e., software ...
Arnold S. Tran, Richard A. Forsberg, Jack C. Lee   +2 more
openaire   +1 more source

DREAMPIace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement

Design Automation Conference, 2019
Placement for very-large-scale integrated (VLSI) circuits is one of the most important steps for design closure. This paper proposes a novel GPU-accelerated placement framework DREAMPlace, by casting the analytical placement problem equivalently to ...
Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, D. Pan   +7 more
semanticscholar   +1 more source

Genetic design of VLSI-layouts

1st International Conference on Genetic Algorithms in Engineering Systems: Innovations and Applications (GALESIA), 1995
A genetic algorithm for the physical design of VLSI-chips is presented. The algorithm simultaneously optimizes the placement of the cells with the total routing. During the placement the detailed routing is done, while the global routes are optimized by the genetic algorithm.
openaire   +1 more source