Results 261 to 270 of about 76,193 (289)

A Wireless Network-on-Chip Design for Multicore Platforms

2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing, 2011
Aggressive scaling of transistors allows integration of hundreds of processors on a chip. However, on-chip interconnects carrying signals between different blocks will be the bottleneck for system performance and reliability. To tackle this problem, we developed an on-chip communication infrastructure based on a network-on-chip architecture and ...
Chifeng Wang, Wen-Hsiang Hu, Nader Bagherzadeh   +2 more
openaire   +1 more source

Dynamic Application Mapping Algorithm for Wireless Network-on-Chip

2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, 2015
Because of high bandwidth, low latency and flexible topology configurations provided by wireless NoC, this emerging technology is gaining momentum to be a promising future on-chip interconnection paradigm. However, congestion occurrence in wireless routers reduces the benefit of high speed wireless links and significantly increases the network latency,
Amin Rezaei, Masoud Daneshtalab, Danella Zhao, Farshad Safaei, Xiaohang Wang, Masoumeh Ebrahimi   +5 more
openaire   +1 more source

3D(Dimensional)—Wired and Wireless Network-on-Chip (NoC)

2020
Network on Chip is a special unique case of parallel computing systems defined by the tight constraints such as availability of resources, area, cost of the NoC architecture and power consumption. NoC is designed with three main components: switches, Network Interfaces (NIs) and links.
N. Ashokkumar, P. Nagarajan, P. Venkatramana   +2 more
openaire   +1 more source

A novel hierarchical architecture for Wireless Network-on-Chip

Journal of Parallel and Distributed Computing, 2018
Abstract In the architecture of Networks-on-Chip (NoCs), wired structure and multi-hop communications can lead to high power consumption and latency. Wireless NoC (WiNoC) architecture is a new alternative to solve these challenges. In this architecture, long-range wireless links are used instead of multi-hop wired paths.
Bahareh Bahrami, Mohammad Ali Jabraeil Jamali, Shahram Saeidi   +2 more
openaire   +1 more source

Complex network-enabled robust wireless network-on-chip architectures

ACM Journal on Emerging Technologies in Computing Systems, 2013
The Network-on-Chip (NoC) paradigm has emerged as a scalable interconnection infrastructure for modern multicore chips. However, with growing levels of integration, the traditional NoCs suffer from high latency and energy dissipation in on-chip data transfer due to conventional multihop metal/dielectric-based interconnects.
Paul Wettin, Anuroop Vidapalapati, Amlan Gangul, Partha Pratim Pande   +3 more
openaire   +1 more source

A Scalable Hierarchical Ring Based Wireless Network-on-Chip

2016 International Conference on Information Technology (ICIT), 2016
Network-on-Chip (NoC) based systems are becoming more acceptable nowadays compared to System-on-Chips (SoC) for nanoscale system development due to increasing scaling. The weakness of wired communication leads to insertion of wireless links in NoC Systems to mitigate the multihop problem.
Munshi Mostafijur Rahaman, Prasun Ghosal, Siddhartha Biswas   +2 more
openaire   +1 more source

Adaptive Packet Relocator in Wireless Network-on-Chip (WiNoC)

2017
In wireless Network-on-Chip (WiNoC), radio frequency (RF) transceivers account for a significant power consumption, particularly its transmitter, out of its total communication energy. In current WiNoC architectures, high transmission power consumption with constant maximum power suffers from significant energy and load imbalance among RF modules which
Mohd Shahrizal Rusli, Asrani Lit, Muhammad Nadzir Marsono, Maurizio Palesi   +3 more
openaire   +1 more source

Improving Energy Efficiency in Wireless Network-on-Chip Architectures

ACM Journal on Emerging Technologies in Computing Systems, 2017
Wireless Network-on-Chip (WiNoC) represents a promising emerging communication technology for addressing the scalability limitations of future manycore architectures. In a WiNoC, high-latency and power-hungry long-range multi-hop communications can be realized by performance- and energy-efficient single-hop wireless communications.
Catania, Vincenzo, MINEO, ANDREA, Monteleone, Salvatore, Palesi, Maurizio, Patti, Davide   +4 more
openaire   +1 more source

Power efficient router architecture for wireless Network-on-Chip

2016 17th International Symposium on Quality Electronic Design (ISQED), 2016
Wireless Networks-on-Chip (WNoCs) offer the most promising solution to overcome limitations of conventional Networks-on-Chip (NoCs) for long distance communications in future many-core processors. Detailed investigations of NoC with wireless interfaces (WIs) highlight their many benefits.
Hemanta Kumar Mondal, Sri Harsha Gade, Raghav Kishore, Shashwat Kaushik, Sujay Deb   +4 more
openaire   +1 more source

Antennas and Channel Characteristics for Wireless Networks on Chips

Wireless Personal Communications, 2017
We review the current state of the art on antennas for use in wireless networks on chips (WiNoCs) and also provide results on wireless channel characteristics in the WiNoC setting—the latter are largely absent from the literature. We first describe the motivation for constructing these miniature networks, aimed at improving efficiency of future multi ...
William Rayess, David W. Matolak, Savas Kaya, Avinash Karanth Kodi   +3 more
openaire   +1 more source