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Disturbance Relaxation for 3D Flash Memory
IEEE Transactions on Computers, 2016Even though 3D flash memory presents a grand opportunity to huge-capacity non-volatile memory, it suffers from serious program disturbance problems. In contrast to the past efforts in error correction codes and the work in trading the space utilization for reliability, we propose a disturbance-relaxation scheme that can alleviate the negative effects ...
Yu-Ming Chang +4 more
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Characteristics of Junctionless Charge Trap Flash Memory for 3D Stacked NAND Flash
Journal of Nanoscience and Nanotechnology, 2013The electrical characteristics of tunnel barrier engineered-charge trap flash (TBE-CTF) memory devices with junctionless (JL) source and drain (S/D) were investigated. The JL structure is composed of an n(+)-poly-Si based ultra-thin channel and S/D with identical doping concentrations.
Jinho, Oh +3 more
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3D-NAND Flash memory and technology
2019This chapter introduces the design of three-dimensional (3D) NAND flash memory with the implications from the system side. For conventional two-dimensional (2D) scaling, it is facing various limitations such as lithography cost and cell-to-cell coupling interference. To sustain the trend of bit-cost reduction beyond 10 nm technology node, 3D NAND flash
Chao Sun, Ken Takeuchi
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2018
Nowadays, Solid State Drives consume an enormous amount of NAND Flash memories [1] causing a restless pressure on increasing the number of stored bits per mm2. Planar memory cells have been scaled for decades by improving process technology, circuit design, programming algorithms [2], and lithography.
Rino Micheloni +2 more
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Nowadays, Solid State Drives consume an enormous amount of NAND Flash memories [1] causing a restless pressure on increasing the number of stored bits per mm2. Planar memory cells have been scaled for decades by improving process technology, circuit design, programming algorithms [2], and lithography.
Rino Micheloni +2 more
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3D Stacked NAND Flash Memories
2016Market request for bigger and cheaper NAND Flash memories triggers continuous research activity for cell size shrinkage. For many years, workarounds for all the scalability issues of planar Flash memories have been found. Some examples are the improved programming algorithms for controlling electrostatic interference between adjacent cells [6], and the
Rino Micheloni, Luca Crippa
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Reliability challenges in 3D NAND Flash memories
2019 IEEE 11th International Memory Workshop (IMW), 2019The reliability of 3D NAND Flash memory technology is depending on many factors. Most of them are related to the process-induced variability of the layers. Endurance, data retention capabilities, and cross-temperature immunity are the metrics that become affected by this, turning in peculiar reliability challenges that are difficult to be tackled ...
Zambelli C., Micheloni R., Olivo P.
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Microscopic Physical Origin of Charge Traps in 3D NAND Flash Memories
Extended Abstracts of the 2022 International Conference on Solid State Devices and Materials, 2022Abstract We performed the first-principles calculations for a nitrogen vacancy (V N) and hydrogen(H) atom in β-Si3N4 to clarify the atomistic origin of charge traps in silicon nitride (SiN) layers and charge-trapping mechanism used for 3D NAND flash memories.
Fugo Nanataki +5 more
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Reliability of 3D NAND Flash Memories
2016In this chapter the main reliability mechanisms affecting 3D NAND memories will be addressed, providing a comparison between 3D FG and 3D CT devices in terms of reliability and expected performances. Starting from an analysis of basic reliability issues related to both physical and architectural aspects affecting NAND memories, the specific physical ...
GROSSI, Alessandro +2 more
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Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 20213D NAND flash memory faces unprecedented complicated interference than planar NAND flash memory, resulting in more concern regarding reliability and performance. Stronger error correction code (ECC) and adaptive reading strategies are proposed to improve the reliability and performance taking a threshold voltage (V th ) distribution model as the ...
Weihua Liu +7 more
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3D Floating Gate NAND Flash Memories
2016Planar NAND Flash memories (commercially available) are based on Floating Gate, which has been developed and engineered for many decades. Therefore, there have been many attempts to develop 3D Floating Gate cells in order to re-use all the know-how cumulated over time.
Rino Micheloni, Luca Crippa
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