Results 1 to 10 of about 435 (124)

3D NAND Flash Memory Based on Double-Layer NC-Si Floating Gate with High Density of Multilevel Storage [PDF]

open access: yesNanomaterials, 2022
As a strong candidate for computing in memory, 3D NAND flash memory has attracted great attention due to the high computing efficiency, which outperforms the conventional von-Neumann architecture. To ensure 3D NAND flash memory is truly integrated in the
Xinyue Yu   +6 more
doaj   +2 more sources

Dielectric Engineering to Suppress Cell-to-Cell Programming Voltage Interference in 3D NAND Flash Memory [PDF]

open access: yesMicromachines, 2021
In contrast to conventional 2-dimensional (2D) NAND flash memory, in 3D NAND flash memory, cell-to-cell interference stemming from parasitic capacitance between the word-lines (WLs) is difficult to control because the number of WLs, achieved for better ...
Woo-Jin Jung, Jun-Young Park
doaj   +2 more sources

Channel Modeling and Quantization Design for 3D NAND Flash Memory [PDF]

open access: yesEntropy, 2023
As the technology scales down, two-dimensional (2D) NAND flash memory has reached its bottleneck. Three-dimensional (3D) NAND flash memory was proposed to further increase the storage capacity by vertically stacking multiple layers.
Cheng Wang   +5 more
doaj   +2 more sources

Adaptive Bitline Voltage Countermeasure for Neighbor Wordline Interference in 3D NAND Flash Memory-Based Sensors [PDF]

open access: yesSensors, 2023
Three-dimensional NAND flash memory is widely used in sensor systems as an advanced storage medium that ensures system stability through fast data access. However, in flash memory, as the number of cell bits increases and the process pitch keeps scaling,
Hanshui Fan   +6 more
doaj   +2 more sources

Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory [PDF]

open access: yesMicromachines, 2023
The instability in threshold voltage (VTH) and charge distributions in noncircular cells of three-dimensional (3D) NAND flash memory are investigated.
Donghyun Go   +6 more
doaj   +2 more sources

Physical Unclonable Function Based on 3D-NAND Flash Array Structure With Multi-Chip Implementation. [PDF]

open access: yesSmall
Physical unclonable function (PUF) based on a 3D‐NAND flash array is proposed, featuring a multi‐chip structure and a massive challenge–response pair (CRP) capacity. The presented utilizes intrinsic string current variations experimentally verified across eight fabricated 48 × 24 NAND flash arrays.
Hwang H, Youn S, Park J, Yu D, Kim H.
europepmc   +2 more sources

Light-Absorbing-Layer-Free Flash Lamp Annealing for High-Throughput Fabrication of All-Solution-Processed Oxide Electronics. [PDF]

open access: yesAdv Sci (Weinh)
A flash lamp annealing strategy using a mullite chuck enables rapid conversion of sol–gels to metal oxides on silicon and ultra‐thin glass without extra light‐absorbing layers. Direct light absorption initiates the transformation, and the low thermal conductivity of mullite promotes heat accumulation.
Li Z   +5 more
europepmc   +2 more sources

A Unified Flash Memory Platform for Mode-Adaptive and Robust AI Computation. [PDF]

open access: yesAdv Sci (Weinh)
A unified AND‐type flash memory platform enables both transistor‐mode and capacitor‐mode computing‐in‐memory operations within the same device structure. By selectively switching the sensing mode through peripheral reconfiguration, the platform provides adaptable trade‐offs between computational accuracy, robustness, and energy efficiency for AI ...
Yu D   +6 more
europepmc   +2 more sources

Modeling methodology for thermo-structural analysis of V-NAND flash memory structure [PDF]

open access: yesScientific Reports
This study proposes modeling methodology based on a continuous model for conducting thermo-electric-structural analyses of V-NAND flash memory structure under the Joule heating effect.
Yongha Kim, Seungjun Ryu, Sungryung Lee
doaj   +2 more sources

Nitrogen-Doped GeTeS Ovonic Threshold Switching Selector With Optimized Performance Trade-Off for 1S-1R Phase-Change Memory. [PDF]

open access: yesSmall
This study introduced a Ge‐Te‐S co‐sputtering process to resolve the performance trade‐off between GeTe and GeS in OTS selector devices, and improved device durability through nitrogen doping. Furthermore, in a 1S‐1R structure incorporating phase‐change memory devices, it simultaneously achieved excellent thermal stability, durability, high‐speed ...
Kang MS   +6 more
europepmc   +2 more sources

Home - About - Disclaimer - Privacy