Results 41 to 50 of about 4,190 (193)

Systematic Analysis of Spacer and Gate Length Scaling on Memory Characteristics in 3D NAND Flash Memory

open access: yesApplied Sciences
This study investigates the impact of oxide/nitride (ON) pitch scaling on the memory performance of 3D NAND flash memory. We aim to enhance 3D NAND flash memory by systematically reducing the spacer length (Ls) and gate length (Lg) to achieve improved ...
Hee Young Bae   +2 more
doaj   +1 more source

Nonvolatile memory with molecule-engineered tunneling barriers

open access: yes, 2008
We report a novel field-sensitive tunneling barrier by embedding C60 in SiO2 for nonvolatile memory applications. C60 is a better choice than ultra-small nanocrystals due to its monodispersion.
Baik S. J.   +10 more
core   +1 more source

3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer

open access: yesIEEE Access, 2023
To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh   +4 more
doaj   +1 more source

Coding scheme for 3D vertical flash memory

open access: yes, 2015
Recently introduced 3D vertical flash memory is expected to be a disruptive technology since it overcomes scaling challenges of conventional 2D planar flash memory by stacking up cells in the vertical direction.
Bandic, Zvonimir   +4 more
core   +1 more source

Evolution of Materials and Device Stacks for HfO2‐Based Ferroelectric Memories

open access: yesAdvanced Materials Interfaces, EarlyView.
This review summarizes engineering strategies for HfO2 based ferroelectric memories with focus on FeCAP and FeFET structures. It describes how dopant design, stress effects, and interface engineering improve the bulk ferroelectric response. It further discusses how channel engineering supports reliable memory characteristics and scalable integration ...
Eunjin Kim, Jiyong Woo
wiley   +1 more source

Self-Organizing Mapping Neural Network Implementation Based on 3-D NAND Flash for Competitive Learning

open access: yesIEEE Journal of the Electron Devices Society
Self-organizing Map (SOM) neural network is a prominent algorithm in unsupervised machine learning, which is widely used for data clustering, high-dimensional visualization, and feature extraction.
Anyi Zhu   +4 more
doaj   +1 more source

Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory

open access: yesMicromachines, 2021
In this study, polycrystalline silicon (poly-Si) is applied to silicon-oxide-nitride-oxide-silicon (SONOS) flash memory as a channel material and the physical and electrical characteristics are analyzed.
Jun-Kyo Jeong   +5 more
doaj   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

open access: yesAdvanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho   +6 more
wiley   +1 more source

Silicon Nitride Resistive Memories

open access: yesAdvanced Electronic Materials, EarlyView.
Amorphous SiNx is an attractive resistance switching material for ReRAM applications due to its physicochemical properties, such as humidity resistance, low oxygen diffusivity, and is used as a metal diffusion blocker. By modifying the ratio between N and Si atoms, the microstructure of the SiNx is affected, rendering it possible to change the ...
Alexandros‐Eleftherios Mavropoulis   +7 more
wiley   +1 more source

Smart Electrical Screening Methodology for Channel Hole Defects of 3D Vertical NAND (VNAND) Flash Memory

open access: yesEng
In order to successfully achieve mass production in NAND flash memory, a novel test procedure has been proposed to electrically detect and screen the channel hole defects, such as Not-Open, Bowing, and Bending, which are unique in high-density 3D NAND ...
Beomjun Kim   +2 more
doaj   +1 more source

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