Results 51 to 60 of about 3,421,577 (197)
3D-NAND flash memory based neuromorphic computing
Acta Physica Sinica, 2022 A neuromorphic chip is an emerging AI chip. The neuromorphic chip is based on non-Von Neumann architecture, and it simulates the structure and working principle of the human brain. Compared with non-Von Neumann architecture AI chips, the neuromorphic chips have significant improvement of efficiency and energy consumption advantages.
Yang-Yang Chen +3 more
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Investigation of Re-Program Scheme in Charge Trap-Based 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2021 Early retention or initial threshold voltage shift (IVS) is one of the key reliability challenges in charge trapping memory (CTM) based 3D NAND flash. Re-program scheme was introduced in quad-level-cell (QLC) NAND (Shibata et al., 2007, Lee et al., 2018,
Ting Cheng +13 more
doaj +1 more source
NAND Flash Memory Organization and Operations
, 2015 NAND flash memories are well known for their uncomplicated structure, low cost, and high capacity. Their typical characteristics include architecture, sequential reading, and high density.
Kuchta, Radek +2 more
core +1 more source
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Advanced Science, EarlyView.Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source
IEEE Journal of the Electron Devices SocietySelf-organizing Map (SOM) neural network is a prominent algorithm in unsupervised machine learning, which is widely used for data clustering, high-dimensional visualization, and feature extraction.
Anyi Zhu +4 more
doaj +1 more source
Advanced Science, EarlyView.A dual‐randomness hardware platform is demonstrated by integrating PUF and TRNG functionalities into mixed‐ZGO nanoclusters. By leveraging spatial and temporal stochasticity, the mixed‐ZGO NCs device enables both unique identification and random signal generation.
Seungme Kang +6 more
wiley +1 more source
IEEE Access, 2023 To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as electrons accumulation in the inter-cell region are occurred. To solve this problem, a method of
Yun-Jae Oh +4 more
doaj +1 more source
Advanced Science, EarlyView.GeSbSe selector‐only memory devices are investigated through physical and electrical analyses to reveal opposite trap‐state evolution pathways governing reliability degradation. Endurance cycling drives Se migration, transitioning traps from deep to shallow states.
Byung Jun Lee +3 more
wiley +1 more source
Characterizing 3D Floating Gate NAND Flash
, 2017 In this paper, we characterize a state-of-the-art 3D floating gate NAND flash memory through comprehensive experiments on an FPGA platform. Then, we present distinct observations on performance and reliability, such as operation latencies and various ...
Yue Zhu +7 more
core +1 more source
Exploring Design Dimensions in Flash-based Mass-memory Devices [PDF]
, 2009 Mission-critical space system applications present several issues: a typical one is the design of a mass-memory device (i.e., a solid- state recorder).
Caramia, M. +4 more
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