Results 1 to 10 of about 9,708,358 (219)

Modeling methodology for thermo-structural analysis of V-NAND flash memory structure [PDF]

Scientific Reports
This study proposes modeling methodology based on a continuous model for conducting thermo-electric-structural analyses of V-NAND flash memory structure under the Joule heating effect.
Yongha Kim, Seungjun Ryu, Sungryung Lee
doaj   +5 more sources

Numerical Study on the Laser Annealing of Silicon Used in Advanced V-NAND Device [PDF]

Materials, 2022
Laser melt annealing of amorphous silicon (a-Si) and subsequent recrystallization of a-Si are essential processes for successfully implementing vertical NAND (V-NAND) flash memory devices developed based on the cell-over-periphery (COP) structure. The aim of this study was to develop the numerical model for the laser melting process of a-Si used in V ...
Yeong-Il Son, Joonghan Shin
core   +4 more sources

Simulation Acceleration of Bit Error Rate Prediction and Yield Optimization of 3D V-NAND Flash Memory

IEEE Access, 2023
When designing 3D V-NAND technologies with a gate induced drain leakage (GIDL) assisted erase scheme, many experiments must be conducted to determine the optimal GIDL design targets to achieve fast erase performance and secure yield characteristics ...
Yohan Kim, Soyoung Kim
doaj   +4 more sources

What Will Come After V‐NAND—Vertical Resistive Switching Memory? [PDF]

Advanced Electronic Materials, 2019
AbstractThe NAND flash memory serves as the key enabler of the flourishing of portable handheld information devices, such as the cellular phone. The recent upsurge in the sales of vertical NAND flash memory (V‐NAND) entails a further increase in the available information capacity at the edge devices and the servers with higher performance and lower ...
Kyung Jean Yoon, Cheol Seong Hwang
exaly   +4 more sources

Triple‐Level Content‐Addressable Vertical NAND Flash Memory [PDF]

Advanced Science, EarlyView.
Content‐addressable memory (CAM) enables massively parallel search by directly comparing input data with stored entries, offering a powerful paradigm for accelerating data‐intensive tasks. Here, we present a triple‐level content‐addressable vertical NAND
Mingyun Oh, Jonghyun Ko, Yeongheon Yang, Gyuweon Jung, Sung‐Ho Park, Dongbeen Shin, Ryun‐Han Koo, Jong‐Ho Lee, Jiseong Im   +8 more
core   +3 more sources

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash

IEEE Access
We propose a novel dual-doped cylindrical bit-line (DDC-BL) pad structure for vertical NAND (V-NAND) flash memory to enable efficient bulk erase operation through direct hole injection.
Choasub Kim, Jiwook Hong, Moonchurl Kim, Hyoungsub Kim, Jongwook Jeon   +4 more
doaj   +4 more sources

Selective Polarity Control of Metal Oxide Semiconductors for Complementary Logic Gates [PDF]

Advanced Science, EarlyView.
A scalable electrochemical doping strategy enables in situ p‐to‐n polarity conversion in tin oxide (SnO) thin films using electrolyte gating. Both the pristine p‐type SnO transistor and the electrochemically converted n‐type SnO2 transistor exhibited noticeable and stable electrical performance.
Dong Hyun Park, Seung Ho Ryu, Min Su Kim, Taek‐Mo Chung, Seong Keun Kim, In‐Hwan Baek, Keun Hyung Lee   +6 more
wiley   +2 more sources

Integration of Reconfigurable p‐Bit and 1R Crossbar Array for Memristive Probabilistic Computing [PDF]

Advanced Science, EarlyView.
A memristive probabilistic computing system is demonstrated by integrating stochastic p‐bits based on volatile memristors with a 1R crossbar array encoding interaction weights. The system performs weighted‐sum operations across the array and updates p‐bits iteratively.
Keunho Soh, Ji Eun Kim, Suk Yeop Chun, Su In Hwang, Byung Seok Kim, Young Jae Lee, Ho Won Jang, Jung Ho Yoon   +7 more
wiley   +2 more sources

Analysis of vertical AND flash memory for energy-efficient, scalable, fast CIM beyond vertical NAND flash memory [PDF]

Nano Convergence
Compute-in-memory (CIM) has emerged as a promising solution to mitigate the data movement bottleneck in von Neumann architectures. While vertical NAND (V-NAND) flash memory has been explored for CIM, its structural constraints, including pass-bias ...
Jonghyun Ko, Jiseong Im, Sung-Ho Park, Jahyun Gu, Joonhyung Cho, Joon Hwang, Ryun-Han Koo, Jangsaeng Kim, Sung Yun Woo, Jong-Ho Lee   +9 more
doaj   +2 more sources

Concealable physical unclonable functions using vertical NAND flash memory

Nature Communications
Physical Unclonable Functions (PUFs) can address the demand for enhanced hardware security. Vertical NAND (V-NAND) flash memory is the most commercialized non-volatile memory.
Sung-Ho Park, Ryun-Han Koo, Yeongheon Yang, Jiseong Im, Jonghyun Ko, Jong-Ho Lee   +5 more
doaj   +2 more sources