Results 31 to 40 of about 9,708,358 (219)
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories [PDF]
In spite of the mature cell structure, the memory controller architecture of Multi-level cell (MLC) NAND Flash memories is evolving fast in an attempt to improve the uncorrected/miscorrected bit error rate (UBER) and to provide a more flexible usage ...
C. Zambelli +19 more
core +1 more source
Single Event Effects in 3D NAND Flash Memory Cells with Replacement Gate Technology [PDF]
We studied the heavy-ion single event effect response of 3D NAND Flash memory cells with charge-trap based replacement gate technology. Error cross sections, threshold voltage shifts, and underlying mechanisms are discussed.
Gerardin S. +6 more
core +1 more source
EDACs and test integration strategies for NAND flash memories [PDF]
Mission-critical applications usually presents several critical issues: the required level of dependability of the whole mission always implies to address different and contrasting dimensions and to evaluate the tradeoffs among them. A mass-memory device
Piazza, R. +9 more
core +1 more source
Three-dimensional NAND flash memory is widely used in sensor systems as an advanced storage medium that ensures system stability through fast data access. However, in flash memory, as the number of cell bits increases and the process pitch keeps scaling,
Hanshui Fan +6 more
doaj +1 more source
Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory
The instability in threshold voltage (VTH) and charge distributions in noncircular cells of three-dimensional (3D) NAND flash memory are investigated.
Donghyun Go +6 more
doaj +1 more source
Match‐line control unit for power and delay reduction in hybrid CAM
Content addressable memory (CAM) is a hardware search engine utilised for accelerating translation and table look‐up in network routers and data processing systems.
Sheikh Wasmir Hussain +3 more
doaj +1 more source
In questa tesi verranno trattate le memorie Flash. Partendo da una breve introduzione all'argomento, si studierà prima il funzionamento a livello fisico del transistor, il suo inserimento in un'architettura a NAND e i metodi di accesso e scrittura del ...
Felber, Henry
core
Investigation of Poly Silicon Channel Variation in Vertical 3D NAND Flash Memory
Since the most of three dimensional (3D) NAND devices’ channel is composed of polysilicon grain, the actual 3D NAND channel has a wave-shaped channel, not uniform shape.
Inyoung Lee +3 more
doaj +1 more source
As the shrinkage of devices accelerates and the vertical layers increase, beam angle spread of carbon ion implantation (C IIP) for the silicon selective epitaxial growth (Si-SEG) areas in V-NAND is one of the most critical parameters related with bin map defects.
Gui-Fu Yang +6 more
openaire +2 more sources
Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory
In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang +3 more
doaj +1 more source

