Results 51 to 60 of about 4,326 (205)

Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration

Advanced Electronic Materials, EarlyView.
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song, Chenxi Yu, Shangze Li, Dijiang Sun, Jiajia Zhang, Haotong Zhu, Xiaomin Xiao, Xionghao Qin, Xiaoyan Liu, Xing Zhang, Jinfeng Kang   +10 more
wiley   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash

IEEE Access
We propose a novel dual-doped cylindrical bit-line (DDC-BL) pad structure for vertical NAND (V-NAND) flash memory to enable efficient bulk erase operation through direct hole injection.
Choasub Kim, Jiwook Hong, Moonchurl Kim, Hyoungsub Kim, Jongwook Jeon   +4 more
doaj   +1 more source

Novel Program Scheme of Vertical NAND Flash Memory for Reduction of Z-Interference

Micromachines, 2021
Minimizing the variation in threshold voltage (Vt) of programmed cells is required to the extreme level for realizing multi-level-cells; as many as even 5 bits per cell recently.
Su-in Yi, Jungsik Kim
doaj   +1 more source

Samuelson machines and the optimal public-private mix [PDF]

Standard economic analysis assumes the sets of public and private goods to be exogenously given. Yet societies very often choose the public-private mix, using resources to convert seemingly private goods into ones with public goods characteristics and ...
Ravi Kanbur, Simon Clark
core   +3 more sources

Unveiling the Hybrid‐Channel (poly‐Si/IGO) Structure for 3D NAND Flash Memory for Improving the Cell Current and GIDL‐Assisted Erase Operation

Small Structures
Oxide semiconductors (OSs) are promising materials for NAND flash memory, offering the advantages of high field‐effect mobility and superior large‐area uniformity but suffering from low thermal stability, trade‐off between mobility and stability, and the
Su‐Hwan Choi, Jae‐Min Sim, Jeongmin Shin, Seong‐Hwan Ryu, Taewon Hwang, So Young Lim, Hye‐Jin Oh, Jae‐Hyeok Kwag, Jun‐Yeoub Lee, Ki‐Cheol Song, Yeonhee Lee, Minju Song, Junghwan Kim, Chang‐Kyun Park, Yun‐Heub Song, Jin‐Seong Park   +15 more
doaj   +1 more source

Prediction of Random Telegraph Noise-Induced Threshold Voltage Shift and Its Scaling Dependency Using Machine Learning

IEEE Journal of the Electron Devices Society
Random telegraph noise (RTN) shifts the threshold voltage (Vt) of 3D NAND flash memory cells, making it a key factor of the device malfunction. The aim of this study is to predict the distribution of RTN induced ${\mathrm { V}}_{\mathrm { t}}$ shift in
Eunseok Oh, Hyungcheol Shin
doaj   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Optimizing Cell Structure to Improve Cell Characteristics in IGZO Channel-Based 3D NAND Flash With p-Type Gate

IEEE Access
For the first time, a novel IGZO channel-based 3D NAND Flash structure with an embedded p-type poly-Si injection layer is proposed, using integrated structural, material, and operational modifications to address the limitations of the conventional IGZO ...
Sungho Park, Youngho Jung, Daewoong Kang
doaj   +1 more source

Optical programmable processing element using optical fibers [PDF]

, 1992
The purpose of this paper is to present a new type of Optically Processing Element (OPE) based of the use of optical fibers as optical signal transmission ...
González Marcos, Ana, Martín Pereda, José Antonio   +1 more
core