Results 71 to 80 of about 802 (202)

Temperature‐Induced Nonvolatile Switching through Thermal Hysteresis in a Gd3Fe5O12/Ho3Fe5O12 Exchange‐Coupled Rare‐Earth Iron Garnet Bilayer

Advanced Functional Materials, Volume 36, Issue 29, 9 April 2026.
Reducing power consumption in spintronic memory remains a major challenge due to the need for high current densities. A bilayer of gadolinium and holmium iron garnets enables purely temperature‐induced, nonvolatile magnetic switching with bistable states within a ±25 K range. This approach achieves up to 66‐fold lower energy use than current spin–orbit
Junseok Kim, Phuoc Cao Van, Jong‐Ryul Jeong, Hyungyu Jin   +3 more
wiley   +1 more source

Building Reliable Massive Capacity SSDs through a Flash Aware RAID-Like Protection

Applied Sciences, 2020
The demand for mass storage devices has become an inevitable consequence of the explosive increase in data volume. The three-dimensional (3D) vertical NAND (V-NAND) and quad-level cell (QLC) technologies rapidly accelerate the capacity increase of flash ...
Jaeho Kim, Jung Kyu Park
doaj   +1 more source

layer granularity refresh for improving performance and lifetime of 3D NAND flash memory

, 2023
학위논문(석사) - 한국과학기술원 : 전산학부, 2023.2,[iv, 33 p. :]NAND flash refresh schemes have been proposed to mitigate retention errors by remapping pages before excessive errors occur in them.
Kim, Hyungsoon
core  

Characterizing and Optimizing LDPC Performance on 3D NAND Flash Memories

ACM Transactions on Architecture and Code Optimization
With the development of NAND flash memories’ bit density and stacking technologies, while storage capacity keeps increasing, the issue of reliability becomes increasingly prominent. Low-density parity check (LDPC) code, as a robust error-correcting code, is extensively employed in flash memory.
Qiao Li 0001, Yu Chen, Guanyu Wu, Yajuan Du, Min Ye, Xinbiao Gan, Jie Zhang 0048, Zhirong Shen, Jiwu Shu, Chun Xue 0001   +9 more
openaire   +1 more source

Recent Progress and Opportunities in Oxide Semiconductor Devices for In‐Memory and Neuromorphic Computing

Advanced Electronic Materials, Volume 12, Issue 7, 6 April 2026.
This review surveys oxide‐semiconductor devices for in‐memory and neuromorphic computing, highlighting recent progress and remaining challenges in charge‐trap, ferroelectric, and two‐transistor devices. Oxide semiconductors, featuring ultra‐low leakage, low‐temperature processing, and back‐end‐of‐line compatibility, are explored for analog in‐memory ...
Suwon Seong, Taejun Ha, Sangwook Jung, Wontae Jeong, Yoonyoung Chung   +4 more
wiley   +1 more source

NAND flash memory technologies

, 2016
This book discusses basic and advanced NAND flash memory technologies, including the principle of NAND flash, memory cell technologies, multi-bits cell technologies, scaling challenges of memory cell, reliability, and 3-dimensional cell as the future ...
Aritome, Seiichi
core  

Materials Design Principles for Large Memory Windows: Coercive Voltage Engineering in Ferroelectric– Dielectric Heterostructures

Advanced Electronic Materials, Volume 12, Issue 8, 20 April 2026.
Coercive voltage enhancement in hafnia‐based ferroelectric–dielectric heterostructures is shown to originate from leakage‐governed voltage division between the ferroelectric and dielectric layers. Through experiments, circuit modeling, and defect‐based simulations, a universal framework is established to engineer large memory windows without altering ...
Prasanna Venkatesan, Hari Jayasankar, Salma Soliman, Priyankka Ravikumar, Lance Fernandes, Chinsung Park, Amrit Garlapati, Chengyang Zhang, Sanghyun Kang, Shimeng Yu, Suman Datta, Asif Khan, Mengkun Tian, Zheng Wang, Kijoon Kim, Kwangyou Seo, Kwangsoo Kim, Wanki Kim, Daewon Ha, Luca Larcher, Gaurav Thareja, Andrea Padovani   +21 more
wiley   +1 more source

Characterization of TLC 3D-NAND Flash Endurance through Machine Learning for LDPC Code Rate Optimization

, 2017
The advent of the 3D-NAND Flash memories introduced significant issues in terms of characterization and system-level optimization that can be performed to increase the memory reliability over its lifetime.
Cristian Zambelli, Evelina Lamma, Alessia Marelli, Giuseppe Cancelliere, Cancelliere, Giuseppe, LAMMA, Evelina, Marelli, Alessia, RIGUZZI, Fabrizio, Micheloni, Rino, Rino Micheloni, ZAMBELLI, Cristian, OLIVO, Piero, Fabrizio Riguzzi, Piero Olivo   +13 more
core   +1 more source

Flexible Memory: Progress, Challenges, and Opportunities

Advanced Intelligent Discovery, Volume 2, Issue 2, April 2026.
Flexible memory technology is crucial for flexible electronics integration. This review covers its historical evolution, evaluates rigid systems, proposes a flexible memory framework based on multiple mechanisms, stresses material design's role, presents a coupling model for performance optimization, and points out future directions.
Ruizhi Yuan, Sen Chen, Minghui Guo, Ziliang Cui, Yujie Du, Jing Liu   +5 more
wiley   +1 more source

Numerical simulation of RDF and RTN in 3D NAND

, 2021
LAUREA MAGISTRALELa legge di Moore fa sì che i produttori di semiconduttori, di chip di memoria e di logica, possano ridurre i costi dei prodotti e incrementare le prestazioni aumentando la densità di transistor.
Chen, Ziyu
core