Results 81 to 90 of about 4,190 (193)
Review of Memristors for In‐Memory Computing and Spiking Neural Networks
Memristors uniquely enable energy‐efficient, brain‐inspired computing by acting as both memory and synaptic elements. This review highlights their physical mechanisms, integration in crossbar arrays, and role in spiking neural networks. Key challenges, including variability, relaxation, and stochastic switching, are discussed, alongside emerging ...
Mostafa Shooshtari +2 more
wiley +1 more source
A universal temperature‐friendly nonvolatile MRAM (UTF‐NVMRAM) operating from 4 to 400K is realized by optimizing the MgO/MgOx capping layer and incorporating Mo into the CoFeB composite‐free layer. This architecture minimizes temperature sensitivity in switching voltage and thermal stability factor while demonstrating potential CMOS back‐end‐of‐line ...
Ming‐Chun Hong +21 more
wiley +1 more source
Methods for Threshold Voltage Setting of String Select Transistors in Channel Stacked NAND Flash Memory [PDF]
학위논문 (박사)-- 서울대학교 대학원 공과대학 전기·컴퓨터공학부, 2017. 8. 박병국.Since recent mobile electronic devices such as tablets, laptops, smartphones, or solid-state drives (SSDs) have started to adopt the NAND flash memory as their main data storage device, the demand for ...
김도빈
core
Enhancing the environmental sustainability of IT [PDF]
Emerging technologies for learning report - Article exploring green ...
Ohara, Dave, Steven, Anthony
core
Investigation of Retention Noise for 3-D TLC NAND Flash Memory
In this paper, the retention noise [electron emission statistics (EES)] after program operation of 3-D triple-level program cell (TLC) NAND flash memory is investigated.
Kunliang Wang +3 more
doaj +1 more source
A Novel Program Scheme for Z-Interference Improvement in 3D NAND Flash Memory. [PDF]
Jia J, Jin L, Jia X, You K.
europepmc +1 more source
Investigation of Erase Cycling Induced Joint Dummy Cell Disturbance in Dual-Deck 3D NAND Flash Memory. [PDF]
You K, Jin L, Jia J, Huo Z.
europepmc +1 more source
White Light Interference Solution for Novel 3D NAND VIA Dishing Metrology
In traditional 3D NAND design, peripheral circuit accounts for 20-30% of the chip real-estate, which reduces the memory density of flash memory. As 3D NAND technology stacks to 128 layers or higher, peripheral circuits may account for more than 50% of ...
Xiaoye Ding +5 more
doaj +1 more source
For the first time, a novel IGZO channel-based 3D NAND Flash structure with an embedded p-type poly-Si injection layer is proposed, using integrated structural, material, and operational modifications to address the limitations of the conventional IGZO ...
Sungho Park, Youngho Jung, Daewoong Kang
doaj +1 more source
Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory [PDF]
We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode.
Chen, Dakai +6 more
core +1 more source

