Results 31 to 40 of about 485 (168)

Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages

Micromachines, 2022
Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some potential challenges should be investigated.
Dongwoo Lee, Changhwan Shin
doaj   +1 more source

Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory

IEEE Access, 2021
In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang, Yuan Li, Xiaolei Ma, Jiezhi Chen   +3 more
doaj   +1 more source

Analysis of High-Temperature Data Retention in 3D Floating-Gate nand Flash Memory Arrays

IEEE Journal of the Electron Devices Society, 2023
In this paper, we present a detailed experimental investigation of high-temperature data retention in 3D floating-gate NAND Flash memory arrays. Data reveal that charge detrapping from the cell tunnel oxide and depassivation of traps in the string ...
Gerardo Malavena, Mattia Giulianini, Luca Chiavarone, Alessandro S. Spinelli, Christian Monzio Compagnoni   +4 more
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A Behavioral Compact Model of 3D NAND Flash Memory

CoRR, 2018
We present a behavioral compact model of 3D NAND flash memory for integrated circuits and system-level applications. This model is easy to implement, computationally efficient, fast, accurate and effectively accounts for the different parasitic capacitance coupling effects applicable to the 3D geometry of the vertical channel Macaroni body charge-trap ...
Shubham Sahay, Dmitri B. Strukov
openaire   +2 more sources

Adaptive Pulse Programming Scheme for Improving the V_th Distribution and Program Performance in 3D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2021
For triple-level or quad-level 3D NAND flash memory, narrowing the Vth distribution of each state without influencing page program performance is one of the challenges.
Zhichao Du, Shuang Li, Yu Wang, Xiang Fu, Fei Liu, Qi Wang, Zongliang Huo   +6 more
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Analysis of HBM Failure in 3D NAND Flash Memory

Electronics, 2022
Electrostatic discharge (ESD) events are the main factors impacting the reliability of NAND Flash memory. The behavior of human body model (HBM) failure and the corresponding physical mechanism of 3D NAND Flash memory are investigated in this paper. A catastrophic burn-out failure during HBM zapping is first presented. Analysis shows that NMOS fingers’
Song, Biruo, Li, Zhiguo, Wang, Xin, Fu, Xiang, Liu, Fei, Jin, Lei, Huo, Zongliang   +6 more
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Controlling the Carrier Injection Efficiency in 3D Nanocrystalline Silicon Floating Gate Memory by Novel Design of Control Layer

Nanomaterials, 2023
Three-dimensional NAND flash memory with high carrier injection efficiency has been of great interest to computing in memory for its stronger capability to deal with big data than that of conventional von Neumann architecture.
Hongsheng Hu, Zhongyuan Ma, Xinyue Yu, Tong Chen, Chengfeng Zhou, Wei Li, Kunji Chen, Jun Xu, Ling Xu   +8 more
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Impact of Cycling Induced Intercell Trapped Charge on Retention Charge Loss in 3-D NAND Flash Memory

IEEE Journal of the Electron Devices Society, 2020
As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics ...
Xinlei Jia, Lei Jin, Wei Hou, Zhiyu Wang, Songmin Jiang, Kaiwei Li, Dejia Huang, Hongtao Liu, Wenzhe Wei, Jianwei Lu, An Zhang, Zongliang Huo   +11 more
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3D-NAND flash memory based neuromorphic computing

Acta Physica Sinica, 2022
A neuromorphic chip is an emerging AI chip. The neuromorphic chip is based on non-Von Neumann architecture, and it simulates the structure and working principle of the human brain. Compared with non-Von Neumann architecture AI chips, the neuromorphic chips have significant improvement of efficiency and energy consumption advantages.
Yang-Yang Chen, Yu-Hui He, Xiang-Shui Miao, Dao-Hong Yang   +3 more
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Systematic Analysis of Spacer and Gate Length Scaling on Memory Characteristics in 3D NAND Flash Memory

Applied Sciences
This study investigates the impact of oxide/nitride (ON) pitch scaling on the memory performance of 3D NAND flash memory. We aim to enhance 3D NAND flash memory by systematically reducing the spacer length (Ls) and gate length (Lg) to achieve improved ...
Hee Young Bae, Seul Ki Hong, Jong Kyung Park   +2 more
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