Results 31 to 40 of about 802 (202)
Single Event Effects in 3D NAND Flash Memory Cells with Replacement Gate Technology [PDF]
, 2022 We studied the heavy-ion single event effect response of 3D NAND Flash memory cells with charge-trap based replacement gate technology. Error cross sections, threshold voltage shifts, and underlying mechanisms are discussed.
Gerardin S. +6 more
core +1 more source
Hydrogen Source and Diffusion Path for Poly-Si Channel Passivation in Xtacking 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2020 Poly-Si channels need well passivated by using hydrogen passivation process in 3D NAND flash memories for better poly-Si quality with low trap density.
Xinshuai Shen +7 more
doaj +1 more source
A Novel Program Suspend Scheme for Improving the Reliability of 3D NAND Flash Memory
IEEE Journal of the Electron Devices Society, 2022 Experimental results indicate that the conventional program suspend scheme in 3D NAND flash memory chip can generate unexpected additional read fail bits and reduce the reliability of 3D NAND flash memory. These extra read fail bits are observed when the
Zhichao Du +11 more
doaj +1 more source
3D NAND flash memory based on junction-less a-Si:H channel with high on/off current ratio
AIP Advances, 2022 As the key hardware unit of computing in memory, 3D NAND flash memory has been the focus of the artificial intelligence (AI) era due to its high efficiency in processing massive and diverse data, which is superior to the conventional von-Neumann ...
Xinyue Yu +7 more
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2021 Reading data at a temperature which different from writing can cause a large number of failed bits in 3D NAND Flash memory. In this work, the threshold voltage (Vth) temperature effect of 3D NAND flash memory cell was investigated and a method was ...
Dan Wu +4 more
doaj +1 more source
Memories - Materials, Devices, Circuits and Systems, 2023 In this paper, we propose a gate-all-around with back-gate (GAAB) 3D NAND flash memory structure for high performance and reliability. First, in the selected string, we confirmed that the proposed structure can improve program performance using negative ...
Jae-Min Sim +6 more
doaj +1 more source
Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages
Micromachines, 2022 Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some potential challenges should be investigated.
Dongwoo Lee, Changhwan Shin
doaj +1 more source
Charge Loss Induced by Defects of Transition Layer in Charge-Trap 3D NAND Flash Memory
IEEE Access, 2021 In charge-trap (CT) three-dimensional (3D) NAND flash memory, the transition layer between Si3N4 CT layer and SiO2 tunneling layer is inevitable, and the defects in the transition layer are expected to cause both lateral and vertical charge loss.
Fei Wang +3 more
doaj +1 more source
A Behavioral Compact Model of 3D NAND Flash Memory
CoRR, 2018 We present a behavioral compact model of 3D NAND flash memory for integrated circuits and system-level applications. This model is easy to implement, computationally efficient, fast, accurate and effectively accounts for the different parasitic capacitance coupling effects applicable to the 3D geometry of the vertical channel Macaroni body charge-trap ...
Shubham Sahay, Dmitri B. Strukov
openaire +2 more sources
IEEE Journal of the Electron Devices Society, 2021 For triple-level or quad-level 3D NAND flash memory, narrowing the Vth distribution of each state without influencing page program performance is one of the challenges.
Zhichao Du +6 more
doaj +1 more source