Results 21 to 30 of about 3,421,577 (197)

Balancing Page Endurance Variation Between Layers to Extend 3D NAND Flash Memory Lifetime [PDF]

Micromachines (Basel)
With vertical stacking, 3D NAND’s flash memory can achieve continuous capacity growth. However, the endurance variation between the stacked layers becomes more and more significant due to process variation, which will lead to the underutilization ...
Yajuan Du, Jialin Wang, Yi Fan, Siyi Huang, Yu Wan   +4 more
core   +2 more sources

Light‐Absorbing‐Layer‐Free Flash Lamp Annealing for High‐Throughput Fabrication of All‐Solution‐Processed Oxide Electronics [PDF]

Advanced Science, Volume 13, Issue 61, 3 November 2026.
A flash lamp annealing strategy using a mullite chuck enables rapid conversion of sol–gels to metal oxides on silicon and ultra‐thin glass without extra light‐absorbing layers. Direct light absorption initiates the transformation, and the low thermal conductivity of mullite promotes heat accumulation.
Zetong Li, Wei He, Guangji Wang, Jingwei Zhang, Zhimin Chai, Xinchun Lu   +5 more
wiley   +2 more sources

Vertical 3D NAND Flash Memory Technology

ECS Transactions, 2011
We've developed Bit Cost Scalable (BiCS) flash technology as a three-dimensional memory for the future ultra high density storage devices, which extremely reduces the chip costs by vertically stacking memory arrays with punch and plug process.
Hideaki Aochi, Akihiro Nitayama
core   +2 more sources

Modeling methodology for thermo-structural analysis of V-NAND flash memory structure [PDF]

Scientific Reports
This study proposes modeling methodology based on a continuous model for conducting thermo-electric-structural analyses of V-NAND flash memory structure under the Joule heating effect.
Yongha Kim, Seungjun Ryu, Sungryung Lee
doaj   +2 more sources

Reliability of 3D NAND Flash Memories

, 2016
In this chapter the main reliability mechanisms affecting 3D NAND memories will be addressed, providing a comparison between 3D FG and 3D CT devices in terms of reliability and expected performances.
C. Zambelli, P. Olivo, A. Grossi, ZAMBELLI, Cristian, OLIVO, Piero, GROSSI, Alessandro   +5 more
core   +2 more sources

Re‐Thinking Electronic Circuit Design Through Emerging Reconfigurable Field Effect Transistors [PDF]

Advanced Science, EarlyView.
Graphical illustration of reconfigurable field effect transistor (RFET) operation modes, including n‐type, p‐type, and ambipolar transport, as well as their areas of application discussed in this review: digital circuit design, analog circuit design, post‐Shannon computing, and sensing. ABSTRACT Reconfigurable field‐effect transistors, short RFETs, are
Jens Trommer, Juan P. Martinez, Yuxuan He, Giulio Galderisi, Katrin Pingen, Eduardo Sergio Oliveros‐Mata, Lisa Tellis, Cigdem Cakirlar, Christoph Beyer, Brojogopal Sapui, Joachim Knoch, Klaus Hofmann, Sandro Carrara, Eugenio Cantatore, Max C. Lemme, Ian O'Connor, Akash Kumar, Andre Heinzig, Thomas Mikolajick, Walter M. Weber   +19 more
wiley   +2 more sources

A Unified Flash Memory Platform for Mode‐Adaptive and Robust AI Computation [PDF]

Advanced Science, Volume 13, Issue 56, 9 October 2026.
A unified AND‐type flash memory platform enables both transistor‐mode and capacitor‐mode computing‐in‐memory operations within the same device structure. By selectively switching the sensing mode through peripheral reconfiguration, the platform provides adaptable trade‐offs between computational accuracy, robustness, and energy efficiency for AI ...
Dayeon Yu, Hwiho Hwang, Byeongchan Oh, Junmo Lee, Shimeng Yu, Tae‐Hyeon Kim, Hyungjin Kim   +6 more
wiley   +2 more sources

Impact of Program–Erase Operation Intervals at Different Temperatures on 3D Charge-Trapping Triple-Level-Cell NAND Flash Memory Reliability [PDF]

Micromachines
Three-dimensional charge-trapping (CT) NAND flash memory has attracted extensive attention owing to its unique merits, including huge storage capacities, large memory densities, and low bit cost.
Xuesong Zheng, Yifan Wu, Haitao Dong, Yizhi Liu, Pengpeng Sang, Liyi Xiao, Xuepeng Zhan   +6 more
doaj   +2 more sources

Wordline Input Bias Scheme for Neural Network Implementation in 3D-NAND Flash [PDF]

Biomimetics
In this study, we propose a neuromorphic computing system based on a 3D-NAND flash architecture that utilizes analog input voltages applied through wordlines (WLs).
Hwiho Hwang, Gyeonghae Kim, Dayeon Yu, Hyungjin Kim   +3 more
doaj   +2 more sources

MoS2 Channel‐Enhanced High‐Density Charge Trap Flash Memory and Machine Learning‐Assisted Sensing Methodologies for Memory‐Centric Computing Systems [PDF]

Advanced Science
Driven by the shift of artificial intelligence (AI) workloads to edge devices, there is a growing demand for nonvolatile memory solutions that offer high‐density, low‐power consumption, and reliability.
Ki Han Kim, Ju Han Park, Khang June Lee, Ji‐Won Seo, Yeong Kwon Kim, Junhwan Choi, Min‐Jae Seo, Byung Chul Jang   +7 more
doaj   +2 more sources