Results 221 to 230 of about 73,522 (251)
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2018
Nowadays, Solid State Drives consume an enormous amount of NAND Flash memories [1] causing a restless pressure on increasing the number of stored bits per mm2. Planar memory cells have been scaled for decades by improving process technology, circuit design, programming algorithms [2], and lithography.
Rino Micheloni +2 more
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Nowadays, Solid State Drives consume an enormous amount of NAND Flash memories [1] causing a restless pressure on increasing the number of stored bits per mm2. Planar memory cells have been scaled for decades by improving process technology, circuit design, programming algorithms [2], and lithography.
Rino Micheloni +2 more
openaire +1 more source
3D Stacked NAND Flash Memories
2016Market request for bigger and cheaper NAND Flash memories triggers continuous research activity for cell size shrinkage. For many years, workarounds for all the scalability issues of planar Flash memories have been found. Some examples are the improved programming algorithms for controlling electrostatic interference between adjacent cells [6], and the
Rino Micheloni, Luca Crippa
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Reliability challenges in 3D NAND Flash memories
2019 IEEE 11th International Memory Workshop (IMW), 2019The reliability of 3D NAND Flash memory technology is depending on many factors. Most of them are related to the process-induced variability of the layers. Endurance, data retention capabilities, and cross-temperature immunity are the metrics that become affected by this, turning in peculiar reliability challenges that are difficult to be tackled ...
Zambelli C., Micheloni R., Olivo P.
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Microscopic Physical Origin of Charge Traps in 3D NAND Flash Memories
Extended Abstracts of the 2022 International Conference on Solid State Devices and Materials, 2022Abstract We performed the first-principles calculations for a nitrogen vacancy (V N) and hydrogen(H) atom in β-Si3N4 to clarify the atomistic origin of charge traps in silicon nitride (SiN) layers and charge-trapping mechanism used for 3D NAND flash memories.
Fugo Nanataki +5 more
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Reliability of 3D NAND Flash Memories
2016In this chapter the main reliability mechanisms affecting 3D NAND memories will be addressed, providing a comparison between 3D FG and 3D CT devices in terms of reliability and expected performances. Starting from an analysis of basic reliability issues related to both physical and architectural aspects affecting NAND memories, the specific physical ...
GROSSI, Alessandro +2 more
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Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 20213D NAND flash memory faces unprecedented complicated interference than planar NAND flash memory, resulting in more concern regarding reliability and performance. Stronger error correction code (ECC) and adaptive reading strategies are proposed to improve the reliability and performance taking a threshold voltage (V th ) distribution model as the ...
Weihua Liu +7 more
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3D Floating Gate NAND Flash Memories
2016Planar NAND Flash memories (commercially available) are based on Floating Gate, which has been developed and engineered for many decades. Therefore, there have been many attempts to develop 3D Floating Gate cells in order to re-use all the know-how cumulated over time.
Rino Micheloni, Luca Crippa
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Vertical-channel stacked array (VCSTAR) for 3D NAND flash memory
2011 International Semiconductor Device Research Symposium (ISDRS), 2011Abstract A novel three-dimensional (3D) NAND flash memory, VCSTAR (Vertical-Channel STacked ARray), is investigated. The proposed device is a vertical channel structure having stacked word-lines to achieve high memory density without shrinking cell channel length.
Se Hwan Park +4 more
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Characterization of Inter-Cell Interference in 3D NAND Flash Memory
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021We characterize inter-cell interference in commercial three-dimensional NAND flash memory. By writing random data into 3D NAND and collecting sample means and sample variances of cell values corresponding to a particular set of input values in fixed relative neighboring cell locations, it is shown that the interference coming from any target cell ...
Suk Kwang Park, Jaekyun Moon
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Overview of Advanced 3D Charge-trapping Flash Memory Devices
MRS Proceedings, 2010AbstractAlthough conventional floating gate (FG) Flash memory has already gone into the sub-30 nm node, the technology challenges are formidable beyond 20nm. The fundamental challenges include FG interference, few-electron storage caused statistical fluctuation, poor short-channel effect, WL-WL breakdown, poor reliability, and edge effect sensitivity ...
Hang-Ting Lue +2 more
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