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IMPLY-Based High-Speed Conditional Carry and Carry Select Adders for In-Memory Computing

IEEE transactions on nanotechnology, 2023
Big data applications involved with neural networks requires frequent data transfer between memory and processing elements and thus, take a significant portion of energy.
Nandi Kaushik, S. Bodapati
semanticscholar   +1 more source

A Low Latency Approximate Adder Design Based on Dual Sub-Adders With Error Recovery

IEEE Transactions on Emerging Topics in Computing, 2023
This paper presents a novel dual sub-adder based approximate adder that splits a precise adder into two to significantly reduce the latency. The proposed error recovery and reduction technique effectively compensates for the catastrophic accuracy ...
Hyoju Seo, Yongtae Kim
semanticscholar   +1 more source

Synthesis of Approximate Parallel-Prefix Adders

IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 2023
Approximate computation has evolved recently as a viable alternative for maximizing energy efficiency. One aspect of approximate computing involves the design of hardware units that return a sufficiently accurate result for the examined occasion, rather ...
A. Stefanidis   +4 more
semanticscholar   +1 more source

Analysis of various Approximate adders in Ripple Carry Adder design.

2023 4th IEEE Global Conference for Advancement in Technology (GCAT), 2023
In this paper various types of approximate full adders are used and tested on ripple carry adder RCA (both 4 bit as well as 8 bit RCA) by replacing them in different bit positions and have been tested for various parameters.
R.V Nithyashree   +2 more
semanticscholar   +1 more source

Design of High Speed 8-bit Vedic Multiplier using Brent Kung Adders

International Conference on Computing Communication and Networking Technologies, 2022
One of the primary purposes of a digital signal processing system is multiplication. The multiplier’s performance affects the DSP system’s overall performance.
Aruru Sai Kumar   +3 more
semanticscholar   +1 more source

Polynomial Formal Verification of Prefix Adders

Asian Test Symposium, 2021
Nowadays, prefix adders are widely used in different designs and applications due to their flexible carry propagation hardware. The variety of these adders makes it possible to find the best choice based on the design parameters, e.g., area, delay ...
Alireza Mahzoon, R. Drechsler
semanticscholar   +1 more source

Late Breaking Results: Polynomial Formal Verification of Fast Adders

Design Automation Conference, 2021
Despite the recent success of formal verification methods, the computational complexity of most of them is still unknown. It raises serious questions regarding the scalability of the approaches.
Alireza Mahzoon, R. Drechsler
semanticscholar   +1 more source

ADDER

Spravochnik. Inzhenernyi zhurnal, 2021
The article describes an electronic multifunctional adder for electricity metering SEM-3. The authors give the technical characteristics, the device and the principle of its operation. The presented adder is designed to monitor and account for the consumption of electricity generation and power directly from consumers, as well as in automated ...
A. N. Brysin   +3 more
openaire   +1 more source

Sum Propagate Adders

IEEE Transactions on Emerging Topics in Computing, 2021
Binary adders are present in every digital computer system. Even if their structure has evolved significantly over the last decades following the progress in logic and circuit design, the scaling of implementation technologies, and the improvement of ...
G. Dimitrakopoulos   +2 more
semanticscholar   +1 more source

Design of approximate adders and multipliers for error tolerant image processing

Microprocessors and microsystems, 2020
An adder is the basic computational circuit in digital Very Large Scale Integration (VLSI) design. To improve the design metrics of an adder, Approximate Adders (AAs) have been proposed.
Anusha Gorantla, P. Deepa
semanticscholar   +1 more source

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